ARM: dts: stm32mp13: add SCMI nodes
authorPatrick Delaunay <patrick.delaunay@foss.st.com>
Wed, 6 Jul 2022 16:20:25 +0000 (18:20 +0200)
committerPatrick Delaunay <patrick.delaunay@foss.st.com>
Tue, 12 Jul 2022 09:46:30 +0000 (11:46 +0200)
Add the node for SCMI firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
arch/arm/dts/stm32mp13-u-boot.dtsi
arch/arm/dts/stm32mp131.dtsi

index adc7e67..01552ad 100644 (file)
        u-boot,dm-pre-reloc;
 };
 
+&scmi {
+       u-boot,dm-pre-reloc;
+};
+
+&scmi_clk {
+       u-boot,dm-pre-reloc;
+};
+
+&scmi_reset {
+       u-boot,dm-pre-reloc;
+};
+
+&scmi_shm {
+       u-boot,dm-pre-reloc;
+};
+
+&scmi_sram {
+       u-boot,dm-pre-reloc;
+};
+
 &syscfg {
        u-boot,dm-pre-reloc;
 };
index 652743f..8f7af65 100644 (file)
                interrupt-parent = <&intc>;
        };
 
+       scmi_sram: sram@2ffff000 {
+               compatible = "mmio-sram";
+               reg = <0x2ffff000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x2ffff000 0x1000>;
+
+               scmi_shm: scmi_shm@0 {
+                       compatible = "arm,scmi-shmem";
+                       reg = <0 0x80>;
+               };
+       };
+
        firmware {
                optee: optee {
                        method = "smc";
                        compatible = "linaro,optee-tz";
                };
+
+               scmi: scmi {
+                       compatible = "linaro,scmi-optee";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       linaro,optee-channel-id = <0>;
+                       shmem = <&scmi_shm>;
+
+                       scmi_clk: protocol@14 {
+                               reg = <0x14>;
+                               #clock-cells = <1>;
+                       };
+
+                       scmi_reset: protocol@16 {
+                               reg = <0x16>;
+                               #reset-cells = <1>;
+                       };
+               };
        };
 
        clocks {