ARM: dts: sti: move usb picophy nodes out of soc in stih418.dtsi
authorAlain Volmat <avolmat@me.com>
Fri, 11 Feb 2022 18:16:14 +0000 (19:16 +0100)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Tue, 15 Feb 2022 17:08:55 +0000 (18:08 +0100)
Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
Since they are controlled via syscfg, there is no reg property needed,
which is required when having the node within the soc section.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
arch/arm/boot/dts/stih418.dtsi

index 97eda43..b35b9b7 100644 (file)
                };
        };
 
+       usb2_picophy1: phy2 {
+               compatible = "st,stih407-usb2-phy";
+               #phy-cells = <0>;
+               st,syscfg = <&syscfg_core 0xf8 0xf4>;
+               resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+                        <&picophyreset STIH407_PICOPHY0_RESET>;
+               reset-names = "global", "port";
+       };
+
+       usb2_picophy2: phy3 {
+               compatible = "st,stih407-usb2-phy";
+               #phy-cells = <0>;
+               st,syscfg = <&syscfg_core 0xfc 0xf4>;
+               resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
+                        <&picophyreset STIH407_PICOPHY1_RESET>;
+               reset-names = "global", "port";
+       };
+
        soc {
                rng11: rng@8a8a000 {
                        status = "disabled";
                };
 
-               usb2_picophy1: phy2@0 {
-                       compatible = "st,stih407-usb2-phy";
-                       reg = <0 0>;
-                       #phy-cells = <0>;
-                       st,syscfg = <&syscfg_core 0xf8 0xf4>;
-                       resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
-                                <&picophyreset STIH407_PICOPHY0_RESET>;
-                       reset-names = "global", "port";
-               };
-
-               usb2_picophy2: phy3@0 {
-                       compatible = "st,stih407-usb2-phy";
-                       reg = <0 0>;
-                       #phy-cells = <0>;
-                       st,syscfg = <&syscfg_core 0xfc 0xf4>;
-                       resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
-                                <&picophyreset STIH407_PICOPHY1_RESET>;
-                       reset-names = "global", "port";
-               };
-
                ohci0: usb@9a03c00 {
                        compatible = "st,st-ohci-300x";
                        reg = <0x9a03c00 0x100>;