Andes AE350 SoC Platform
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-The AE350 AXI/AHB-based platform N25(F)/NX25(F)/D25F/A25/AX25 CPU with
-level-one memories,interrupt controller, debug module, AXI and AHB Bus
-Matrix Controller, AXI-to-AHB Bridge and a collection of fundamentalAHB/APB
-bus IP components pre-integrated together as a system design.The high-quality
-and configurable AHB/APB IPs suites a majority embedded systems,
-and the verified platform serves as a starting point to jump start SoC designs.
+The AE350 AXI/AHB-based platform N25(F)/NX25(F)/D25F/A25/AX25 CPU with level-one
+memories,interrupt controller, debug module, AXI and AHB Bus Matrix Controller,
+AXI-to-AHB Bridge and a collection of fundamentalAHB/APB bus IP components
+pre-integrated together as a system design.The high-quality and configurable
+AHB/APB IPs suites a majority embedded systems, and the verified platform serves
+as a starting point to jump start SoC designs.
-To build platform specific library and firmwares, provide the *PLATFORM=andes/ae350* parameter to the top level make command.
+To build platform specific library and firmwares, provide the
+*PLATFORM=andes/ae350* parameter to the top level make command.
Platform Options
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Building Andes AE350 Platform
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-To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using the compile time option FW_PAYLOAD_FDT_PATH.
+To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using
+the compile time option FW_PAYLOAD_FDT_PATH.
AE350's dts is included in https://github.com/andestech/linux/tree/ast-v3_2_0-release-public