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target-arm: correct cp15 c1_sys reset value for cortex-a8
author
Mattias Holm
<holm@liacs.nl>
Wed, 8 Dec 2010 11:15:17 +0000
(13:15 +0200)
committer
Aurelien Jarno
<aurelien@aurel32.net>
Mon, 27 Dec 2010 20:21:17 +0000
(21:21 +0100)
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm/helper.c
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diff --git
a/target-arm/helper.c
b/target-arm/helper.c
index
409a6c0
..
e54fb27
100644
(file)
--- a/
target-arm/helper.c
+++ b/
target-arm/helper.c
@@
-109,6
+109,7
@@
static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_ccsid[0] = 0xe007e01a; /* 16k L1 dcache. */
env->cp15.c0_ccsid[1] = 0x2007e01a; /* 16k L1 icache. */
env->cp15.c0_ccsid[2] = 0xf0000000; /* No L2 icache. */
+ env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
set_feature(env, ARM_FEATURE_V6);