#define SBI_PLATFORM_HART_COUNT_OFFSET (0x50)
/** Offset of hart_stack_size in struct sbi_platform */
#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
-/** Offset of disabled_hart_mask in struct sbi_platform */
-#define SBI_PLATFORM_DISABLED_HART_OFFSET (0x58)
/** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x60)
+#define SBI_PLATFORM_OPS_OFFSET (0x58)
/** Offset of firmware_context in struct sbi_platform */
-#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x58 + __SIZEOF_POINTER__)
#define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT (1UL << 12)
/** Exit platform timer for current HART */
void (*timer_exit)(void);
+ /** Check whether given hart is disabled */
+ bool (*hart_disabled)(u32 hartid);
+
/** Bringup the given hart from previous stage **/
int (*hart_start)(u32 hartid, ulong saddr, ulong priv);
/**
u32 hart_count;
/** Per-HART stack size for exception/interrupt handling */
u32 hart_stack_size;
- /** Mask representing the set of disabled HARTs */
- u64 disabled_hart_mask;
/** Pointer to sbi platform operations */
unsigned long platform_ops_addr;
/** Pointer to system firmware specific context */
static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
u32 hartid)
{
- if (plat && (plat->disabled_hart_mask & (1 << hartid)))
- return TRUE;
+ if (plat && sbi_platform_ops(plat)->hart_disabled)
+ return sbi_platform_ops(plat)->hart_disabled(hartid);
return FALSE;
}
/* Platform descriptor. */
const struct sbi_platform_operations platform_ops = {
-
.final_init = ae350_final_init,
.pmp_region_count = ae350_pmp_region_count,
};
const struct sbi_platform platform = {
-
.opensbi_version = OPENSBI_VERSION,
.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
.name = "Andes AE350",
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = AE350_HART_COUNT,
.hart_stack_size = AE350_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};
.features = SBI_ARIANE_FEATURES,
.hart_count = ARIANE_HART_COUNT,
.hart_stack_size = 4096,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};
.features = SBI_PLATFORM_HAS_TIMER_VALUE,
.hart_count = K210_HART_COUNT,
.hart_stack_size = K210_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = VIRT_HART_COUNT,
.hart_stack_size = VIRT_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};
return clint_warm_timer_init();
}
+static bool fu540_hart_disabled(u32 hartid)
+{
+ return (FU540_HARITD_DISABLED & (1UL << hartid)) ? TRUE : FALSE;
+}
+
static int fu540_system_down(u32 type)
{
/* For now nothing to do. */
.timer_event_stop = clint_timer_event_stop,
.timer_event_start = clint_timer_event_start,
.timer_init = fu540_timer_init,
+ .hart_disabled = fu540_hart_disabled,
.system_reboot = fu540_system_down,
.system_shutdown = fu540_system_down
};
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = FU540_HART_COUNT,
.hart_stack_size = FU540_HART_STACK_SIZE,
- .disabled_hart_mask = FU540_HARITD_DISABLED,
.platform_ops_addr = (unsigned long)&platform_ops
};
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = SPIKE_HART_COUNT,
.hart_stack_size = SPIKE_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = 1,
.hart_stack_size = 4096,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};
.features = SBI_THEAD_FEATURES,
.hart_count = C910_HART_COUNT,
.hart_stack_size = C910_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
.platform_ops_addr = (unsigned long)&platform_ops
};