radv: refactor handling of nir_options
authorRhys Perry <pendingchaos02@gmail.com>
Tue, 16 Jun 2020 15:33:32 +0000 (16:33 +0100)
committerMarge Bot <eric+marge@anholt.net>
Fri, 3 Sep 2021 13:21:28 +0000 (13:21 +0000)
Make it easier to change them depending on chip_class and family.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>

src/amd/vulkan/radv_device.c
src/amd/vulkan/radv_private.h
src/amd/vulkan/radv_shader.c
src/amd/vulkan/radv_shader.h

index 41f2752..ed25ab5 100644 (file)
@@ -708,6 +708,8 @@ radv_physical_device_try_create(struct radv_instance *instance, drmDevicePtr drm
 
    radv_physical_device_get_supported_extensions(device, &device->vk.supported_extensions);
 
+   radv_get_nir_options(device);
+
 #ifndef _WIN32
    if (drm_device) {
       struct stat primary_stat = {0}, render_stat = {0};
index e75dc24..9005f53 100644 (file)
@@ -297,6 +297,8 @@ struct radv_physical_device {
    dev_t primary_devid;
    dev_t render_devid;
 #endif
+
+   nir_shader_compiler_options nir_options;
 };
 
 struct radv_instance {
index eb3c6d3..5952f95 100644 (file)
 #include "sid.h"
 #include "vk_format.h"
 
-static const struct nir_shader_compiler_options nir_options = {
-   .vertex_id_zero_based = true,
-   .lower_scmp = true,
-   .lower_flrp16 = true,
-   .lower_flrp32 = true,
-   .lower_flrp64 = true,
-   .lower_device_index_to_zero = true,
-   .lower_fdiv = true,
-   .lower_fmod = true,
-   .lower_ineg = true,
-   .lower_bitfield_insert_to_bitfield_select = true,
-   .lower_bitfield_extract = true,
-   .lower_pack_snorm_2x16 = true,
-   .lower_pack_snorm_4x8 = true,
-   .lower_pack_unorm_2x16 = true,
-   .lower_pack_unorm_4x8 = true,
-   .lower_pack_half_2x16 = true,
-   .lower_pack_64_2x32 = true,
-   .lower_pack_64_4x16 = true,
-   .lower_pack_32_2x16 = true,
-   .lower_unpack_snorm_2x16 = true,
-   .lower_unpack_snorm_4x8 = true,
-   .lower_unpack_unorm_2x16 = true,
-   .lower_unpack_unorm_4x8 = true,
-   .lower_unpack_half_2x16 = true,
-   .lower_ffma16 = true,
-   .lower_ffma32 = true,
-   .lower_ffma64 = true,
-   .lower_fpow = true,
-   .lower_mul_2x32_64 = true,
-   .lower_rotate = true,
-   .has_fsub = true,
-   .has_isub = true,
-   .use_scoped_barrier = true,
-   .max_unroll_iterations = 32,
-   .max_unroll_iterations_aggressive = 128,
-   .use_interpolated_input_intrinsics = true,
-   .vectorize_vec2_16bit = true,
-   /* nir_lower_int64() isn't actually called for the LLVM backend, but
-    * this helps the loop unrolling heuristics. */
-   .lower_int64_options = nir_lower_imul64 | nir_lower_imul_high64 | nir_lower_imul_2x32_64 |
-                          nir_lower_divmod64 | nir_lower_minmax64 | nir_lower_iabs64,
-   .lower_doubles_options = nir_lower_drcp | nir_lower_dsqrt | nir_lower_drsq | nir_lower_ddiv,
-   .divergence_analysis_options = nir_divergence_view_index_uniform,
-};
+void
+radv_get_nir_options(struct radv_physical_device *device)
+{
+   device->nir_options = (nir_shader_compiler_options){
+      .vertex_id_zero_based = true,
+      .lower_scmp = true,
+      .lower_flrp16 = true,
+      .lower_flrp32 = true,
+      .lower_flrp64 = true,
+      .lower_device_index_to_zero = true,
+      .lower_fdiv = true,
+      .lower_fmod = true,
+      .lower_ineg = true,
+      .lower_bitfield_insert_to_bitfield_select = true,
+      .lower_bitfield_extract = true,
+      .lower_pack_snorm_2x16 = true,
+      .lower_pack_snorm_4x8 = true,
+      .lower_pack_unorm_2x16 = true,
+      .lower_pack_unorm_4x8 = true,
+      .lower_pack_half_2x16 = true,
+      .lower_pack_64_2x32 = true,
+      .lower_pack_64_4x16 = true,
+      .lower_pack_32_2x16 = true,
+      .lower_unpack_snorm_2x16 = true,
+      .lower_unpack_snorm_4x8 = true,
+      .lower_unpack_unorm_2x16 = true,
+      .lower_unpack_unorm_4x8 = true,
+      .lower_unpack_half_2x16 = true,
+      .lower_ffma16 = true,
+      .lower_ffma32 = true,
+      .lower_ffma64 = true,
+      .lower_fpow = true,
+      .lower_mul_2x32_64 = true,
+      .lower_rotate = true,
+      .has_fsub = true,
+      .has_isub = true,
+      .use_scoped_barrier = true,
+      .max_unroll_iterations = 32,
+      .max_unroll_iterations_aggressive = 128,
+      .use_interpolated_input_intrinsics = true,
+      .vectorize_vec2_16bit = true,
+      /* nir_lower_int64() isn't actually called for the LLVM backend,
+       * but this helps the loop unrolling heuristics. */
+      .lower_int64_options = nir_lower_imul64 | nir_lower_imul_high64 | nir_lower_imul_2x32_64 |
+                             nir_lower_divmod64 | nir_lower_minmax64 | nir_lower_iabs64,
+      .lower_doubles_options = nir_lower_drcp | nir_lower_dsqrt | nir_lower_drsq | nir_lower_ddiv,
+      .divergence_analysis_options = nir_divergence_view_index_uniform,
+   };
+}
 
 bool
 radv_can_dump_shader(struct radv_device *device, struct vk_shader_module *module,
@@ -427,7 +431,7 @@ radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *
        * shader directly.  In that case, we just ignore the SPIR-V entirely
        * and just use the NIR shader */
       nir = module->nir;
-      nir->options = &nir_options;
+      nir->options = &device->physical_device->nir_options;
       nir_validate_shader(nir, "in internal shader");
 
       assert(exec_list_length(&nir->functions) == 1);
@@ -518,7 +522,7 @@ radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *
             },
       };
       nir = spirv_to_nir(spirv, module->size / 4, spec_entries, num_spec_entries, stage,
-                         entrypoint_name, &spirv_options, &nir_options);
+                         entrypoint_name, &spirv_options, &device->physical_device->nir_options);
       assert(nir->info.stage == stage);
       nir_validate_shader(nir, "after spirv_to_nir");
 
index d943818..debc52f 100644 (file)
@@ -41,6 +41,7 @@
 
 #define RADV_VERT_ATTRIB_MAX MAX2(VERT_ATTRIB_MAX, VERT_ATTRIB_GENERIC0 + MAX_VERTEX_ATTRIBS)
 
+struct radv_physical_device;
 struct radv_device;
 struct radv_pipeline;
 struct radv_pipeline_cache;
@@ -573,4 +574,6 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
 bool radv_consider_culling(struct radv_device *device, struct nir_shader *nir,
                            uint64_t ps_inputs_read);
 
+void radv_get_nir_options(struct radv_physical_device *device);
+
 #endif