usb/penwell_otg: update USB charger type detection flow

BZ: 14936

2 patches missed, which can cause USB Host PC can not be
detected by penwell correctly.

Change-Id: Ie1dd3d4be2e5afa9924c3cb7c3be95ee942adde7
Signed-off-by: Wu, Hao <hao.wu@intel.com>
Reviewed-on: http://android.intel.com:8080/24844
Reviewed-by: Gross, Mark <mark.gross@intel.com>
Tested-by: Gross, Mark <mark.gross@intel.com>

diff --git a/drivers/usb/otg/penwell_otg.c b/drivers/usb/otg/penwell_otg.c
index 0112e1f..e99d5a4 100644 (file)
--- a/drivers/usb/otg/penwell_otg.c
+++ b/drivers/usb/otg/penwell_otg.c
@@ -833,7 +833,7 @@ static int penwell_otg_data_contact_detect(void)
 {
        struct penwell_otg      *pnw = the_transceiver;
        u8                      data;
-       int                     count = 10;
+       int                     count = 50;
        int                     retval = 0;
 
        dev_dbg(pnw->dev, "%s --->\n", __func__);
@@ -874,19 +874,19 @@ static int penwell_otg_data_contact_detect(void)
        dev_dbg(pnw->dev, "Start Polling for Data contact detection!\n");
 
        while (count) {
-               retval = intel_scu_ipc_ioread8(MSIC_PWRCTRL, &data);
+               retval = intel_scu_ipc_ioread8(MSIC_USB_MISC, &data);
                if (retval) {
                        dev_warn(pnw->dev, "Failed to read MSIC register\n");
                        return retval;
                }
 
-               if (data & DPVSRCEN) {
+               if (data & MISC_CHGDSERXDPINV) {
                        dev_dbg(pnw->dev, "Data contact detected!\n");
                        return 0;
                }
                count--;
-               /* Interval is 50ms */
-               msleep(50);
+               /* Interval is 10 - 11ms */
+               usleep_range(10000, 11000);
        }
 
        dev_dbg(pnw->dev, "Data contact Timeout\n");
@@ -1846,6 +1846,18 @@ static void penwell_otg_work(struct work_struct *work)
 
                        penwell_update_transceiver();
                } else if (hsm->b_sess_vld) {
+                       /* Check if DCP is detected */
+                       spin_lock_irqsave(&pnw->charger_lock, flags);
+                       charger_type = pnw->charging_cap.chrg_type;
+                       if (charger_type == CHRG_DCP) {
+                               spin_unlock_irqrestore(&pnw->charger_lock,
+                                               flags);
+                               break;
+                       }
+                       spin_unlock_irqrestore(&pnw->charger_lock, flags);
+
+                       penwell_otg_phy_low_power(0);
+
                        /* Check it is caused by ACA attachment */
                        if (hsm->id == ID_ACA_B) {
                                /* in this case, update current limit*/

diff --git a/include/linux/usb/penwell_otg.h b/include/linux/usb/penwell_otg.h
index 8035d91..2ad1780 100644 (file)
--- a/include/linux/usb/penwell_otg.h
+++ b/include/linux/usb/penwell_otg.h
@@ -117,8 +117,8 @@
 #      define SPWRSRINT1_CDP           BIT(6)
 #      define SPWRSRINT1_SDP           0
 #      define SPWRSRINT1_DCP           BIT(2)
-#define MSIC_IS4SET            0x2c8   /* Intel Specific */
-#      define IS4_CHGDSERXDPINV        BIT(5)
+#define MSIC_USB_MISC          0x2c8   /* Intel Specific */
+#      define MISC_CHGDSERXDPINV       BIT(5)
 #define MSIC_OTGCTRL           0x39c
 #define MSIC_OTGCTRLSET                0x340
 #define MSIC_OTGCTRLCLR                0x341