gcc/

	PR target/67636
	PR target/64345
	* config/sh/sh.md (*zero_extract_3): New insn_and_split pattern.

gcc/testsuite/
	PR target/67636
	PR target/64345
	* gcc.target/sh/pr54236-1.c: Adjust optimization level.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233397 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7760029..de5a749 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,8 +1,13 @@
+2016-02-13  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       PR target/67636
+       PR target/64345
+       * config/sh/sh.md (*zero_extract_3): New insn_and_split pattern.
+
 2016-02-12  Walter Lee  <walt@tilera.com>
 
-        * config/tilepro/t-tilepro: Replace CC_FOR_BUILD with
-          CXX_FOR_BUILD.
-        * config/tilegx/t-tilegx: Likewise.
+       * config/tilepro/t-tilepro: Replace CC_FOR_BUILD with CXX_FOR_BUILD.
+       * config/tilegx/t-tilegx: Likewise.
 
 2016-02-12  David Malcolm  <dmalcolm@redhat.com>
 

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 203215a..b5b0f95 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -14616,6 +14616,31 @@ label:
   [(set (reg:SI T_REG)
        (zero_extract:SI (match_dup 0) (const_int 1) (match_dup 1)))])
 
+(define_insn_and_split "*zero_extract_3"
+  [(set (match_operand:SI 0 "arith_reg_dest")
+       (and:SI (lshiftrt:SI (match_operand:SI 1 "arith_reg_operand")
+                            (match_operand 2 "const_int_operand"))
+               (match_operand 3 "const_int_operand")))
+   (clobber (reg:SI T_REG))]
+  "TARGET_SH1 && can_create_pseudo_p ()
+   && exact_log2 (INTVAL (operands[3])) >= 0"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+{
+  int rshift = INTVAL (operands[2]);
+  int lshift = exact_log2 (INTVAL (operands[3]));
+
+  rtx tmp = gen_reg_rtx (SImode);
+  emit_insn (gen_rtx_PARALLEL (VOIDmode,
+    gen_rtvec (2,
+      gen_rtx_SET (tmp,
+                  gen_rtx_ZERO_EXTRACT (SImode, operands[1], const1_rtx,
+                                        GEN_INT (rshift + lshift))),
+      gen_rtx_CLOBBER (VOIDmode, get_t_reg_rtx ()))));
+  emit_insn (gen_ashlsi3 (operands[0], tmp, GEN_INT (lshift)));
+})
+
 ;; -------------------------------------------------------------------------
 ;; SH2A instructions for bitwise operations.
 ;; FIXME: Convert multiple instruction insns to insn_and_split.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7fbd202..e2b7a57 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2016-02-13  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       PR target/67636
+       PR target/64345
+       * gcc.target/sh/pr54236-1.c: Adjust optimization level.
+
 2016-02-12  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
        PR libgfortran/69668

diff --git a/gcc/testsuite/gcc.target/sh/pr54236-1.c b/gcc/testsuite/gcc.target/sh/pr54236-1.c
index 7d89a5e..31008ca 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/pr54236-1.c
+++ b/gcc/testsuite/gcc.target/sh/pr54236-1.c
@@ -2,7 +2,7 @@
    special cases.  If everything works as expected we won't see any
    movt instructions in these cases.  */
 /* { dg-do compile }  */
-/* { dg-options "-O1" } */
+/* { dg-options "-O2" } */
 /* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
 /* { dg-final { scan-assembler-times "addc" 6 } } */
 /* { dg-final { scan-assembler-times "subc" 4 } } */