Fix CoreLib build warnings (#13851)

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Aes.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Aes.cs
index 3d47f7ee5f8ab1b138b792119c942e7b9474cc82..43aebc990cb9e9581e21f19580ff3b5b64611a8a 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Aes.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Aes.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel AES hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Aes 
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx.cs
index 8072e260ac83d5deaade7bb0e3979c942e432775..ad0bfc9e1b11d94edb38c90905b04bbe957d5996 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel AVX hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Avx
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx2.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx2.cs
index ee73bd01ac27a704330a143c44205fa47ad26404..cd652c26e2acb3fe1d1539fcd996f6d5a83f73c9 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx2.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Avx2.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel AVX2 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Avx2
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi1.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi1.cs
index b1ae7476b129f7ab6c9ecbfee57f921e6836df79..a2bfcffedc3555f982f4fce74ea8feba8445eac5 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi1.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi1.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel BMI1 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Bmi1
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi2.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi2.cs
index 35e896e2a3af235ee5c559f69997eb1c6b154557..a9a73de9263e155550b4c79ddec67e243695ccaf 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi2.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Bmi2.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel BMI2 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Bmi2
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Lzcnt.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Lzcnt.cs
index d13de51f6e8321ec34a9be81577a519904a67746..ffc656e43b113fe6a1d0e9efa1e8e72886df53f2 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Lzcnt.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Lzcnt.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel LZCNT hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Lzcnt
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Pclmulqdq.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Pclmulqdq.cs
index 0c62a3ed972fe8666204ffdab0679a3821a5892a..f8576f89fe08a94f0d902259cc8e953fdbf18b17 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Pclmulqdq.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Pclmulqdq.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel PCLMULQDQ hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Pclmulqdq
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Popcnt.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Popcnt.cs
index eeb243d7884644ec65050dc1a332467b1d667cb6..66f2ab127dd81c9a9ad365dce6195a92a102d0b9 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Popcnt.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Popcnt.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel POPCNT hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Popcnt
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse.cs
index 90d6b173b14b68d79f08f648facb1a4cab5e8a1a..c85aee30155a917e460268d8321ea7959f6690cd 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel SSE hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Sse
     {
         public static bool IsSupported { get { return false; } }
@@ -214,4 +215,4 @@ namespace System.Runtime.Intrinsics.X86
         /// </summary>
         public static Vector128<float> Xor(Vector128<float> left,  Vector128<float> right) { throw new NotImplementedException(); }
     }
-}
\ No newline at end of file
+}

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse2.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse2.cs
index c940c6d4a915f849d9e5e18732cbe7d2470e87a3..ffe35f883cd89210bf5f3cfd839443d06b92e824 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse2.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse2.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel SSE2 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Sse2
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse3.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse3.cs
index eeb95befc1fea6454b3c014c0de241910b51a124..5e4ac9dd0ee2c290304db7486ef12ce326b0394f 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse3.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse3.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel SSE3 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Sse3
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse41.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse41.cs
index 9980c3465fa69b06145e920497c100d63a56ea88..5a498bcf4efe912f0de033a8175d3fefd5e0d364 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse41.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse41.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel SSE4.1 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Sse41
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse42.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse42.cs
index 9ba7396ccf9a9ad8466b98a481cd4702a74e6b8d..f644577ae170a29c4e45bcbdc6795bf609a80926 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse42.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Sse42.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel SSE4.2 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Sse42
     {
         public static bool IsSupported { get { return false; } }

diff --git a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Ssse3.cs b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Ssse3.cs
index 32d9886249a4e55023aa0adf6182de784479589b..0ce9036a8f03614e864176eaa8ad0b61f78957a7 100644 (file)
--- a/src/mscorlib/src/System/Runtime/Intrinsics/X86/Ssse3.cs
+++ b/src/mscorlib/src/System/Runtime/Intrinsics/X86/Ssse3.cs
@@ -10,6 +10,7 @@ namespace System.Runtime.Intrinsics.X86
     /// <summary>
     /// This class provides access to Intel SSSE3 hardware instructions via intrinsics
     /// </summary>
+    [CLSCompliant(false)]
     public static class Ssse3
     {
         public static bool IsSupported { get { return false; } }