This parameter can be changed dynamically.
Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level.
+- 'dma_desc_per_channel' - This parameter defines number of hardware buffer
+ descriptors allocated for each registered Tsi721 DMA channel.
+ Its default value is 128.
+
+- 'dma_txqueue_sz' - DMA transactions queue size. Defines number of pending
+ transaction requests that can be accepted by each DMA channel.
+ Default value is 16.
+
+- 'dma_sel' - DMA channel selection mask. Bitmask that defines which hardware
+ DMA channels (0 ... 6) will be registered with DmaEngine core.
+ If bit is set to 1, the corresponding DMA channel will be registered.
+ DMA channels not selected by this mask will not be used by this device
+ driver. Default value is 0x7f (use all channels).
+
II. Known problems
None.
#include "tsi721.h"
-#define TSI721_DMA_TX_QUEUE_SZ 16 /* number of transaction descriptors */
-
#ifdef CONFIG_PCI_MSI
static irqreturn_t tsi721_bdma_msix(int irq, void *ptr);
#endif
static int tsi721_submit_sg(struct tsi721_tx_desc *desc);
static unsigned int dma_desc_per_channel = 128;
-module_param(dma_desc_per_channel, uint, S_IWUSR | S_IRUGO);
+module_param(dma_desc_per_channel, uint, S_IRUGO);
MODULE_PARM_DESC(dma_desc_per_channel,
"Number of DMA descriptors per channel (default: 128)");
+static unsigned int dma_txqueue_sz = 16;
+module_param(dma_txqueue_sz, uint, S_IRUGO);
+MODULE_PARM_DESC(dma_txqueue_sz,
+ "DMA Transactions Queue Size (default: 16)");
+
+static u8 dma_sel = 0x7f;
+module_param(dma_sel, byte, S_IRUGO);
+MODULE_PARM_DESC(dma_sel,
+ "DMA Channel Selection Mask (default: 0x7f = all)");
+
static inline struct tsi721_bdma_chan *to_tsi721_chan(struct dma_chan *chan)
{
return container_of(chan, struct tsi721_bdma_chan, dchan);
tsi_debug(DMA, &dchan->dev->device, "DMAC%d", bdma_chan->id);
if (bdma_chan->bd_base)
- return TSI721_DMA_TX_QUEUE_SZ;
+ return dma_txqueue_sz;
/* Initialize BDMA channel */
if (tsi721_bdma_ch_init(bdma_chan, dma_desc_per_channel)) {
}
/* Allocate queue of transaction descriptors */
- desc = kcalloc(TSI721_DMA_TX_QUEUE_SZ, sizeof(struct tsi721_tx_desc),
+ desc = kcalloc(dma_txqueue_sz, sizeof(struct tsi721_tx_desc),
GFP_ATOMIC);
if (!desc) {
tsi_err(&dchan->dev->device,
bdma_chan->tx_desc = desc;
- for (i = 0; i < TSI721_DMA_TX_QUEUE_SZ; i++) {
+ for (i = 0; i < dma_txqueue_sz; i++) {
dma_async_tx_descriptor_init(&desc[i].txd, dchan);
desc[i].txd.tx_submit = tsi721_tx_submit;
desc[i].txd.flags = DMA_CTRL_ACK;
bdma_chan->active = true;
tsi721_bdma_interrupt_enable(bdma_chan, 1);
- return TSI721_DMA_TX_QUEUE_SZ;
+ return dma_txqueue_sz;
}
static void tsi721_sync_dma_irq(struct tsi721_bdma_chan *bdma_chan)
int i;
for (i = 0; i < TSI721_DMA_MAXCH; i++) {
- if (i != TSI721_DMACH_MAINT)
+ if ((i != TSI721_DMACH_MAINT) && (dma_sel & (1 << i)))
tsi721_dma_stop(&priv->bdma[i]);
}
}
for (i = 0; i < TSI721_DMA_MAXCH; i++) {
struct tsi721_bdma_chan *bdma_chan = &priv->bdma[i];
- if (i == TSI721_DMACH_MAINT)
+ if ((i == TSI721_DMACH_MAINT) || (dma_sel & (1 << i)) == 0)
continue;
bdma_chan->regs = priv->regs + TSI721_DMAC_BASE(i);