intel/fs: Properly lower 64-bit MUL on 64-bit-incapable platforms

There are two problems this commit solves:  First, is that the 64x64 MUL
lowering generates a Q MOV which, because of how late it runs in the
compile pipeline, it never gets removed.  Second, it generates 32x32
MULs and we have to run it a second time to lower those.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7329>

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index fd46625..f9f24d2 100644 (file)
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -4122,7 +4122,14 @@ fs_visitor::lower_mul_qword_inst(fs_inst *inst, bblock_t *block)
    ibld.ADD(subscript(bd, BRW_REGISTER_TYPE_UD, 1),
             subscript(bd, BRW_REGISTER_TYPE_UD, 1), ad);
 
-   ibld.MOV(inst->dst, bd);
+   if (devinfo->has_64bit_int) {
+      ibld.MOV(inst->dst, bd);
+   } else {
+      ibld.MOV(subscript(inst->dst, BRW_REGISTER_TYPE_UD, 0),
+               subscript(bd, BRW_REGISTER_TYPE_UD, 0));
+      ibld.MOV(subscript(inst->dst, BRW_REGISTER_TYPE_UD, 1),
+               subscript(bd, BRW_REGISTER_TYPE_UD, 1));
+   }
 }
 
 void
@@ -7924,7 +7931,13 @@ fs_visitor::optimize()
    }
 
    OPT(opt_combine_constants);
-   OPT(lower_integer_multiplication);
+   if (OPT(lower_integer_multiplication)) {
+      /* If lower_integer_multiplication made progress, it may have produced
+       * some 32x32-bit MULs in the process of lowering 64-bit MULs.  Run it
+       * one more time to clean those up if they exist.
+       */
+      OPT(lower_integer_multiplication);
+   }
    OPT(lower_sub_sat);
 
    if (devinfo->gen <= 5 && OPT(lower_minmax)) {