radv: pass radv_shader to radv_dump_shader_stats()
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Mon, 13 Mar 2023 12:32:23 +0000 (13:32 +0100)
committerMarge Bot <emma+marge@anholt.net>
Tue, 21 Mar 2023 20:36:13 +0000 (20:36 +0000)
Preliminary work for moving the shaders array outside of radv_pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21878>

src/amd/vulkan/radv_debug.c
src/amd/vulkan/radv_pipeline.c
src/amd/vulkan/radv_pipeline_rt.c
src/amd/vulkan/radv_shader.c
src/amd/vulkan/radv_shader.h

index d46a2cd..c65aae7 100644 (file)
@@ -452,7 +452,7 @@ radv_dump_shader(struct radv_pipeline *pipeline, struct radv_shader *shader,
            shader->ir_string);
    fprintf(f, "DISASM:\n%s\n", shader->disasm_string);
 
-   radv_dump_shader_stats(pipeline->device, pipeline, stage, f);
+   radv_dump_shader_stats(pipeline->device, pipeline, shader, stage, f);
 }
 
 static void
index 64b4a6f..207d8c2 100644 (file)
@@ -3552,7 +3552,7 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline,
       free(binaries[i]);
       if (stages[i].nir) {
          if (radv_can_dump_shader_stats(device, stages[i].nir) && pipeline->base.shaders[i]) {
-            radv_dump_shader_stats(device, &pipeline->base, i, stderr);
+            radv_dump_shader_stats(device, &pipeline->base, pipeline->base.shaders[i], i, stderr);
          }
 
          ralloc_free(stages[i].nir);
@@ -5412,7 +5412,8 @@ radv_compute_pipeline_compile(struct radv_compute_pipeline *pipeline,
 
    free(binaries[MESA_SHADER_COMPUTE]);
    if (radv_can_dump_shader_stats(device, cs_stage.nir)) {
-      radv_dump_shader_stats(device, &pipeline->base, MESA_SHADER_COMPUTE, stderr);
+      radv_dump_shader_stats(device, &pipeline->base, pipeline->base.shaders[MESA_SHADER_COMPUTE],
+                             MESA_SHADER_COMPUTE, stderr);
    }
    ralloc_free(cs_stage.nir);
 
index 9a3dcc7..89267c8 100644 (file)
@@ -311,7 +311,8 @@ radv_rt_pipeline_compile(struct radv_pipeline *pipeline,
 
    free(binaries[rt_stage.stage]);
    if (radv_can_dump_shader_stats(device, rt_stage.nir)) {
-      radv_dump_shader_stats(device, pipeline, rt_stage.stage, stderr);
+      radv_dump_shader_stats(device, pipeline, pipeline->shaders[rt_stage.stage], rt_stage.stage,
+                             stderr);
    }
    ralloc_free(rt_stage.nir);
 
index 0da4fe6..5f85520 100644 (file)
@@ -3230,9 +3230,8 @@ radv_compute_spi_ps_input(const struct radv_pipeline_key *pipeline_key,
 
 VkResult
 radv_dump_shader_stats(struct radv_device *device, struct radv_pipeline *pipeline,
-                       gl_shader_stage stage, FILE *output)
+                       struct radv_shader *shader, gl_shader_stage stage, FILE *output)
 {
-   struct radv_shader *shader = pipeline->shaders[stage];
    VkPipelineExecutablePropertiesKHR *props = NULL;
    uint32_t prop_count = 0;
    VkResult result;
index 1380e2a..46ac486 100644 (file)
@@ -650,7 +650,7 @@ bool radv_can_dump_shader(struct radv_device *device, nir_shader *nir, bool meta
 bool radv_can_dump_shader_stats(struct radv_device *device, nir_shader *nir);
 
 VkResult radv_dump_shader_stats(struct radv_device *device, struct radv_pipeline *pipeline,
-                                gl_shader_stage stage, FILE *output);
+                                struct radv_shader *shader, gl_shader_stage stage, FILE *output);
 
 static inline struct radv_shader *
 radv_shader_ref(struct radv_shader *shader)