stm32mp1: mmu_set_region_dcache_behaviour
authorPatrick Delaunay <patrick.delaunay@st.com>
Fri, 24 Jul 2020 09:21:51 +0000 (11:21 +0200)
committerPatrice Chotard <patrice.chotard@st.com>
Tue, 28 Jul 2020 15:21:37 +0000 (17:21 +0200)
Since commit d877f8fd0f09 ("arm: provide a function for boards init
code to modify MMU virtual-physical map") the parameter of
mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE
aligned.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
arch/arm/mach-stm32mp/cpu.c

index 56092c8..b7fcee2 100644 (file)
@@ -225,9 +225,10 @@ static void early_enable_caches(void)
        dcache_enable();
 
        if (IS_ENABLED(CONFIG_SPL_BUILD))
-               mmu_set_region_dcache_behaviour(STM32_SYSRAM_BASE,
-                                               STM32_SYSRAM_SIZE,
-                                               DCACHE_DEFAULT_OPTION);
+               mmu_set_region_dcache_behaviour(
+                       ALIGN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE),
+                       round_up(STM32_SYSRAM_SIZE, MMU_SECTION_SIZE),
+                       DCACHE_DEFAULT_OPTION);
        else
                mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
                                                DCACHE_DEFAULT_OPTION);