[masm] Cleanup: Eliminate ScratchRegister2 on AMD64

Functions like loadArgument and storeValue that work right above
the macro assembler may use ScratchRegister because they only call
functions that do not "allocate" that register themselves.

copyValue on the other hand is a higher-level function and may not use
ScratchRegister because the functions it calls (i.e. loadArgument)
may clobber it. In the 64-bit case of quickly copying one VM value
to another location, we might as well use the ReturnValueRegister
as intermediate register and therefore re-allow the use of ScratchRegister
in the lower-level loadArgument/storeArgument functions.

Change-Id: I9f0c0d326e5af87101972f0cceb86cffe4ebdd0d
Reviewed-by: Lars Knoll <lars.knoll@digia.com>

diff --git a/qv4isel_masm.cpp b/qv4isel_masm.cpp
index cd294ca..e5c78ab 100644 (file)
--- a/qv4isel_masm.cpp
+++ b/qv4isel_masm.cpp
@@ -743,9 +743,11 @@ void InstructionSelection::callRuntimeMethodImp(IR::Temp *result, const char* na
 template <typename Result, typename Source>
 void InstructionSelection::copyValue(Result result, Source source)
 {
-#if CPU(X86_64)
-    loadArgument(source, ScratchRegister);
-    storeArgument(ScratchRegister, result);
+#ifdef VALUE_FITS_IN_REGISTER
+    // Use ReturnValueRegister as "scratch" register because loadArgument
+    // and storeArgument are functions that may need a scratch register themselves.
+    loadArgument(source, ReturnValueRegister);
+    storeArgument(ReturnValueRegister, result);
 #else
     loadDouble(source, FPGpr0);
     storeDouble(FPGpr0, result);

diff --git a/qv4isel_masm_p.h b/qv4isel_masm_p.h
index b0e4158..8565ad2 100644 (file)
--- a/qv4isel_masm_p.h
+++ b/qv4isel_masm_p.h
@@ -93,7 +93,6 @@ protected:
     static const RegisterID ContextRegister = JSC::X86Registers::r14;
     static const RegisterID ReturnValueRegister = JSC::X86Registers::eax;
     static const RegisterID ScratchRegister = JSC::X86Registers::r10;
-    static const RegisterID ScratchRegister2 = JSC::X86Registers::r11;
     static const FPRegisterID FPGpr0 = JSC::X86Registers::xmm0;
 
     static const int RegisterSize = 8;
@@ -283,7 +282,7 @@ private:
     void storeArgument(RegisterID src, IR::Temp *temp)
     {
         if (temp) {
-            Pointer addr = loadTempAddress(ScratchRegister2, temp);
+            Pointer addr = loadTempAddress(ScratchRegister, temp);
 #ifdef VALUE_FITS_IN_REGISTER
             store64(src, addr);
 #else