All sclk_uart clocks in TOP CMU have to be kept enabled for suspend/resume
cycle, otherwise TM2(e) boards hangs before entering the suspend mode.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I198880bcee0688c9e33b1e4056b8b60819303945
static const struct samsung_clk_reg_dump top_suspend_regs[] = {
/* force all aclk clocks enabled */
{ ENABLE_ACLK_TOP, 0x67ecffed },
+ /* force all sclk_uart clocks enabled */
+ { ENABLE_SCLK_TOP_PERIC, 0x38 },
/* ISP PLL has to be enabled for suspend: reset value + ENABLE bit */
{ ISP_PLL_CON0, 0x85cc0502 },
/* ISP PLL has to be enabled for suspend: reset value + ENABLE bit */