drm/radeon/kms: rs600: use correct mask for SW interrupt

The mask happens to be the same, but the IH is reading the status, not the
not the control register.

Signed-off-by: Luca Tettamanti <kronos.it@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4f8ea4260572d83ad562b034d4550b8214c4cd01..4245218e954fd908859f8ac39bd87349c9bb3e20 100644 (file)
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -396,7 +396,7 @@ int rs600_irq_process(struct radeon_device *rdev)
        }
        while (status || r500_disp_int) {
                /* SW interrupt */
-               if (G_000040_SW_INT_EN(status))
+               if (G_000044_SW_INT(status))
                        radeon_fence_process(rdev);
                /* Vertical blank interrupts */
                if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))