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drm/radeon/kms: rs600: use correct mask for SW interrupt
author
Luca Tettamanti
<kronos.it@gmail.com>
Mon, 28 Dec 2009 21:53:05 +0000
(22:53 +0100)
committer
Dave Airlie
<airlied@redhat.com>
Thu, 7 Jan 2010 03:57:16 +0000
(13:57 +1000)
The mask happens to be the same, but the IH is reading the status, not the
not the control register.
Signed-off-by: Luca Tettamanti <kronos.it@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/rs600.c
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diff --git
a/drivers/gpu/drm/radeon/rs600.c
b/drivers/gpu/drm/radeon/rs600.c
index
4f8ea42
..
4245218
100644
(file)
--- a/
drivers/gpu/drm/radeon/rs600.c
+++ b/
drivers/gpu/drm/radeon/rs600.c
@@
-396,7
+396,7
@@
int rs600_irq_process(struct radeon_device *rdev)
}
while (status || r500_disp_int) {
/* SW interrupt */
- if (G_00004
0_SW_INT_EN
(status))
+ if (G_00004
4_SW_INT
(status))
radeon_fence_process(rdev);
/* Vertical blank interrupts */
if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))