ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
authorKavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Mon, 4 Jul 2022 13:58:09 +0000 (11:58 -0200)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Tue, 5 Jul 2022 07:25:57 +0000 (10:25 +0300)
On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220704135809.6952-1-kavyasree.kotagiri@microchip.com
arch/arm/boot/dts/lan966x-pcb8291.dts

index 3c7e3a7..d56d205 100644 (file)
 };
 
 &gpio {
-       fc_shrd7_pins: fc_shrd7-pins {
-               pins = "GPIO_49";
-               function = "fc_shrd7";
-       };
-
-       fc_shrd8_pins: fc_shrd8-pins {
-               pins = "GPIO_54";
-               function = "fc_shrd8";
-       };
-
-       fc3_b_pins: fcb3-spi-pins {
-               /* SCK, RXD, TXD */
-               pins = "GPIO_51", "GPIO_52", "GPIO_53";
+       fc3_b_pins: fc3-b-pins {
+               /* RX, TX */
+               pins = "GPIO_52", "GPIO_53";
                function = "fc3_b";
        };
 
@@ -53,7 +43,7 @@
        status = "okay";
 
        usart3: serial@200 {
-               pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
+               pinctrl-0 = <&fc3_b_pins>;
                pinctrl-names = "default";
                status = "okay";
        };