[AMDGPU] Regenerate is.fpclass checks

diff --git a/llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll b/llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
index 4a7ab94..306503a 100644 (file)
--- a/llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
@@ -1,7 +1,8 @@
-; RUN:  llc -global-isel=0 -march=amdgcn -mcpu=gfx704 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX7SELDAG,GFX7CHECK %s
-; RUN:  llc -global-isel=1 -march=amdgcn -mcpu=gfx704 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX7GLISEL,GFX7CHECK %s
-; RUN:  llc -global-isel=0 -march=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX8SELDAG,GFX8CHECK %s
-; RUN:  llc -global-isel=1 -march=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX8GLISEL,GFX8CHECK %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN:  llc -global-isel=0 -march=amdgcn -mcpu=gfx704 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX7CHECK,GFX7SELDAG %s
+; RUN:  llc -global-isel=1 -march=amdgcn -mcpu=gfx704 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX7CHECK,GFX7GLISEL %s
+; RUN:  llc -global-isel=0 -march=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX8CHECK,GFX8SELDAG %s
+; RUN:  llc -global-isel=1 -march=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX8CHECK,GFX8GLISEL %s
 ; RUN:  llc -global-isel=0 -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX9CHECK %s
 ; RUN:  llc -global-isel=1 -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s  | FileCheck --check-prefixes=GFX9CHECK %s
 ; RUN:  llc -global-isel=0 -march=amdgcn -mcpu=gfx1031 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10CHECK %s
@@ -89,18 +90,18 @@ define amdgpu_kernel void @sgpr_isnan_f32(ptr addrspace(1) %out, float %x) {
 }
 
 define amdgpu_kernel void @sgpr_isnan_f64(ptr addrspace(1) %out, double %x) {
-; GFX7ISELDAG-LABEL: sgpr_isnan_f64:
-; GFX7ISELDAG:       ; %bb.0:
-; GFX7ISELDAG-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GFX7ISELDAG-NEXT:    s_mov_b32 s7, 0xf000
-; GFX7ISELDAG-NEXT:    s_mov_b32 s6, -1
-; GFX7ISELDAG-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7ISELDAG-NEXT:    s_mov_b32 s4, s0
-; GFX7ISELDAG-NEXT:    s_mov_b32 s5, s1
-; GFX7ISELDAG-NEXT:    v_cmp_class_f64_e64 s[0:1], s[2:3], 3
-; GFX7ISELDAG-NEXT:    v_cndmask_b32_e64 v0, 0, -1, s[0:1]
-; GFX7ISELDAG-NEXT:    buffer_store_dword v0, off, s[4:7], 0
-; GFX7ISELDAG-NEXT:    s_endpgm
+; GFX7SELDAG-LABEL: sgpr_isnan_f64:
+; GFX7SELDAG:       ; %bb.0:
+; GFX7SELDAG-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
+; GFX7SELDAG-NEXT:    s_mov_b32 s7, 0xf000
+; GFX7SELDAG-NEXT:    s_mov_b32 s6, -1
+; GFX7SELDAG-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX7SELDAG-NEXT:    s_mov_b32 s4, s0
+; GFX7SELDAG-NEXT:    s_mov_b32 s5, s1
+; GFX7SELDAG-NEXT:    v_cmp_class_f64_e64 s[0:1], s[2:3], 3
+; GFX7SELDAG-NEXT:    v_cndmask_b32_e64 v0, 0, -1, s[0:1]
+; GFX7SELDAG-NEXT:    buffer_store_dword v0, off, s[4:7], 0
+; GFX7SELDAG-NEXT:    s_endpgm
 ;
 ; GFX7GLISEL-LABEL: sgpr_isnan_f64:
 ; GFX7GLISEL:       ; %bb.0: