dt/bindings: qcom_nandc: Add DT bindings

Add DT bindings document for the Qualcomm NAND controller driver.

Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
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+* Qualcomm NAND controller
+
+Required properties:
+- compatible:          should be "qcom,ipq806x-nand"
+- reg:                 MMIO address range
+- clocks:              must contain core clock and always on clock
+- clock-names:         must contain "core" for the core clock and "aon" for the
+                       always on clock
+- dmas:                        DMA specifier, consisting of a phandle to the ADM DMA
+                       controller node and the channel number to be used for
+                       NAND. Refer to dma.txt and qcom_adm.txt for more details
+- dma-names:           must be "rxtx"
+- qcom,cmd-crci:       must contain the ADM command type CRCI block instance
+                       number specified for the NAND controller on the given
+                       platform
+- qcom,data-crci:      must contain the ADM data type CRCI block instance
+                       number specified for the NAND controller on the given
+                       platform
+- #address-cells:      <1> - subnodes give the chip-select number
+- #size-cells:         <0>
+
+* NAND chip-select
+
+Each controller may contain one or more subnodes to represent enabled
+chip-selects which (may) contain NAND flash chips. Their properties are as
+follows.
+
+Required properties:
+- compatible:          should contain "qcom,nandcs"
+- reg:                 a single integer representing the chip-select
+                       number (e.g., 0, 1, 2, etc.)
+- #address-cells:      see partition.txt
+- #size-cells:         see partition.txt
+- nand-ecc-strength:   see nand.txt
+- nand-ecc-step-size:  must be 512. see nand.txt for more details.
+
+Optional properties:
+- nand-bus-width:      see nand.txt
+
+Each nandcs device node may optionally contain a 'partitions' sub-node, which
+further contains sub-nodes describing the flash partition mapping. See
+partition.txt for more detail.
+
+Example:
+
+nand@1ac00000 {
+       compatible = "qcom,ebi2-nandc";
+       reg = <0x1ac00000 0x800>;
+
+       clocks = <&gcc EBI2_CLK>,
+                <&gcc EBI2_AON_CLK>;
+       clock-names = "core", "aon";
+
+       dmas = <&adm_dma 3>;
+       dma-names = "rxtx";
+       qcom,cmd-crci = <15>;
+       qcom,data-crci = <3>;
+
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       nandcs@0 {
+               compatible = "qcom,nandcs";
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-ecc-step-size = <512>;
+               nand-bus-width = <8>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "boot-nand";
+                               reg = <0 0x58a0000>;
+                       };
+
+                       partition@58a0000 {
+                               label = "fs-nand";
+                               reg = <0x58a0000 0x4000000>;
+                       };
+               };
+       };
+};