// On MIPS div is asynchronous - it will run in the background while we
// check for special cases.
- __ Ddiv(result, dividend, divisor);
+ __ Div(result, dividend, divisor);
// Check for x / 0.
if (hdiv->CheckFlag(HValue::kCanBeDivByZero)) {
TraceRegWr(alu_out);
break;
case DIV:
- case DDIV:
+ case DDIV: {
+ const int64_t int_min_value =
+ instr->FunctionFieldRaw() == DIV ? INT_MIN : LONG_MIN;
switch (kArchVariant) {
case kMips64r2:
// Divide by zero and overflow was not checked in the
// configuration step - div and divu do not raise exceptions. On
// division by 0 the result will be UNPREDICTABLE. On overflow
// (INT_MIN/-1), return INT_MIN which is what the hardware does.
- if (rs == INT_MIN && rt == -1) {
- set_register(LO, INT_MIN);
+ if (rs == int_min_value && rt == -1) {
+ set_register(LO, int_min_value);
set_register(HI, 0);
} else if (rt != 0) {
set_register(LO, rs / rt);
case kMips64r6:
switch (instr->SaValue()) {
case DIV_OP:
- if (rs == INT_MIN && rt == -1) {
- set_register(rd_reg, INT_MIN);
+ if (rs == int_min_value && rt == -1) {
+ set_register(rd_reg, int_min_value);
} else if (rt != 0) {
set_register(rd_reg, rs / rt);
}
break;
case MOD_OP:
- if (rs == INT_MIN && rt == -1) {
+ if (rs == int_min_value && rt == -1) {
set_register(rd_reg, 0);
} else if (rt != 0) {
set_register(rd_reg, rs % rt);
break;
}
break;
+ }
case DIVU:
if (rt_u != 0) {
set_register(LO, rs_u / rt_u);