drm/msm/dpu: set missing flush bits for INTF_2 and INTF_3
authorJonathan Marek <jonathan@marek.ca>
Sat, 11 Jul 2020 00:47:28 +0000 (20:47 -0400)
committerRob Clark <robdclark@chromium.org>
Fri, 31 Jul 2020 13:46:16 +0000 (06:46 -0700)
This fixes flushing of INTF_2 and INTF_3 on SM8150 and SM8250 hardware.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

index 613ae8f..758c355 100644 (file)
@@ -245,30 +245,14 @@ static int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx,
 static int dpu_hw_ctl_get_bitmask_intf_v1(struct dpu_hw_ctl *ctx,
                u32 *flushbits, enum dpu_intf intf)
 {
-       switch (intf) {
-       case INTF_0:
-       case INTF_1:
-               *flushbits |= BIT(31);
-               break;
-       default:
-               return 0;
-       }
+       *flushbits |= BIT(31);
        return 0;
 }
 
 static int dpu_hw_ctl_active_get_bitmask_intf(struct dpu_hw_ctl *ctx,
                u32 *flushbits, enum dpu_intf intf)
 {
-       switch (intf) {
-       case INTF_0:
-               *flushbits |= BIT(0);
-               break;
-       case INTF_1:
-               *flushbits |= BIT(1);
-               break;
-       default:
-               return 0;
-       }
+       *flushbits |= BIT(intf - INTF_0);
        return 0;
 }