Add instruction selection for string values.

diff --git a/qv4isel.cpp b/qv4isel.cpp
index 7308157..b7d31bf 100644 (file)
--- a/qv4isel.cpp
+++ b/qv4isel.cpp
@@ -204,6 +204,12 @@ void InstructionSelection::visitMove(IR::Move *s)
                 amd64_movsd_reg_regp(_codePtr, X86_XMM0, AMD64_RAX);
                 amd64_call_code(_codePtr, __qmljs_set_activation_property_number);
                 return;
+            } else if (IR::String *str = s->source->asString()) {
+                amd64_mov_reg_reg(_codePtr, AMD64_RDI, AMD64_R14, 8);
+                amd64_mov_reg_imm(_codePtr, AMD64_RSI, propertyName);
+                amd64_mov_reg_imm(_codePtr, AMD64_RDX, new (GC) String(*str->value));
+                amd64_call_code(_codePtr, __qmljs_set_activation_property_string);
+                return;
             } else if (IR::Temp *t = s->source->asTemp()) {
                 amd64_mov_reg_reg(_codePtr, AMD64_RDI, AMD64_R14, 8);
                 amd64_mov_reg_imm(_codePtr, AMD64_RSI, propertyName);
@@ -227,6 +233,12 @@ void InstructionSelection::visitMove(IR::Move *s)
                 amd64_movsd_reg_regp(_codePtr, X86_XMM0, AMD64_RAX);
                 amd64_call_code(_codePtr, __qmljs_init_number);
                 return;
+            } else if (IR::String *str = s->source->asString()) {
+                amd64_mov_reg_reg(_codePtr, AMD64_RDI, AMD64_R14, 8);
+                amd64_lea_membase(_codePtr, AMD64_RSI, AMD64_RSP, offset);
+                amd64_mov_reg_imm(_codePtr, AMD64_RDX, new (GC) String(*str->value));
+                amd64_call_code(_codePtr, __qmljs_init_string);
+                return;
             } else if (IR::Binop *b = s->source->asBinop()) {
                 IR::Temp *l = b->left->asTemp();
                 IR::Temp *r = b->right->asTemp();

diff --git a/tests/simple.js b/tests/simple.js
index 90073a0..30408c2 100644 (file)
--- a/tests/simple.js
+++ b/tests/simple.js
@@ -10,3 +10,5 @@ for (i = 0; i < 1000000; i = i + 1) {
     else
         d = 321
 }
+
+d = "the result is " + d