struct loongarch_integer_op
{
enum rtx_code code;
- unsigned HOST_WIDE_INT value;
+ HOST_WIDE_INT value;
enum loongarch_load_imm_method method;
};
unsigned int cost = 0;
/* Get the lower 32 bits of the value. */
- HOST_WIDE_INT low_part = TARGET_64BIT ? value << 32 >> 32 : value;
+ HOST_WIDE_INT low_part = (int32_t)value;
if (IMM12_OPERAND (low_part) || IMM12_OPERAND_UNSIGNED (low_part))
{
bool lu52i[2] = {(value & LU52I_B) == 0, (value & LU52I_B) == LU52I_B};
int sign31 = (value & (1UL << 31)) >> 31;
+ int sign51 = (value & (1UL << 51)) >> 51;
/* Determine whether the upper 32 bits are sign-extended from the lower
32 bits. If it is, the instructions to load the high order can be
ommitted. */
else if (lu32i[sign31])
{
codes[cost].method = METHOD_LU52I;
- codes[cost].value = (value >> 52) << 52;
+ codes[cost].value = value & LU52I_B;
return cost + 1;
}
codes[cost].method = METHOD_LU32I;
- codes[cost].value = ((value << 12) >> 44) << 32;
+ codes[cost].value = (value & LU32I_B) | (sign51 ? LU52I_B : 0);
cost++;
/* Determine whether the 52-61 bits are sign-extended from the low order,
if (!lu52i[(value & (1ULL << 51)) >> 51])
{
codes[cost].method = METHOD_LU52I;
- codes[cost].value = (value >> 52) << 52;
+ codes[cost].value = value & LU52I_B;
cost++;
}
}