soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Aug 2019 17:05:58 +0000 (19:05 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 23 Aug 2019 08:33:31 +0000 (10:33 +0200)
ARM Erratum 814220 affects Cortex-A7 revisions r0p2-r0p5.

Automatically enable support code to mitigate the erratum when compiling
a kernel for any of the affected Renesas SoCs:
  - R-Mobile APE6: r0p2,
  - RZ/G1E: r0p5,
  - RZ/G1C: r0p5,
  - R-Car H2: r0p3,
  - R-Car E2: r0p5,
  - RZ/N1: r0p5.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/soc/renesas/Kconfig

index 2bbf49e..a72d014 100644 (file)
@@ -72,6 +72,7 @@ config ARCH_R8A73A4
        bool "R-Mobile APE6 (R8A73A40)"
        select ARCH_RMOBILE
        select ARM_ERRATA_798181 if SMP
+       select ARM_ERRATA_814220
        select HAVE_ARM_ARCH_TIMER
        select RENESAS_IRQC
 
@@ -95,11 +96,13 @@ config ARCH_R8A7744
 config ARCH_R8A7745
        bool "RZ/G1E (R8A77450)"
        select ARCH_RCAR_GEN2
+       select ARM_ERRATA_814220
        select SYSC_R8A7745
 
 config ARCH_R8A77470
        bool "RZ/G1C (R8A77470)"
        select ARCH_RCAR_GEN2
+       select ARM_ERRATA_814220
        select SYSC_R8A77470
 
 config ARCH_R8A7778
@@ -117,6 +120,7 @@ config ARCH_R8A7790
        bool "R-Car H2 (R8A77900)"
        select ARCH_RCAR_GEN2
        select ARM_ERRATA_798181 if SMP
+       select ARM_ERRATA_814220
        select I2C
        select SYSC_R8A7790
 
@@ -143,11 +147,13 @@ config ARCH_R8A7793
 config ARCH_R8A7794
        bool "R-Car E2 (R8A77940)"
        select ARCH_RCAR_GEN2
+       select ARM_ERRATA_814220
        select SYSC_R8A7794
 
 config ARCH_R9A06G032
        bool "RZ/N1D (R9A06G032)"
        select ARCH_RZN1
+       select ARM_ERRATA_814220
 
 config ARCH_SH73A0
        bool "SH-Mobile AG5 (R8A73A00)"