clk: qcom: camcc-sm8250: Fix topology around titan_top power domain

[ Upstream commit f8acf01a6a4f84baf05181e24bd48def4ba23f5b ]

On SM8250 two found VFE GDSC power domains shall not be operated, if
titan top is turned off, thus the former power domains will be set as
subdomains by a GDSC registration routine.

Fixes: 5d66ca79b58c ("clk: qcom: Add camera clock controller driver for SM8250")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220519214133.1728979-3-vladimir.zapolskiy@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/qcom/camcc-sm8250.c b/drivers/clk/qcom/camcc-sm8250.c
index ae4e977..9b32c56 100644 (file)
--- a/drivers/clk/qcom/camcc-sm8250.c
+++ b/drivers/clk/qcom/camcc-sm8250.c
@@ -2205,6 +2205,8 @@ static struct clk_branch cam_cc_sleep_clk = {
        },
 };
 
+static struct gdsc titan_top_gdsc;
+
 static struct gdsc bps_gdsc = {
        .gdscr = 0x7004,
        .pd = {
@@ -2238,6 +2240,7 @@ static struct gdsc ife_0_gdsc = {
                .name = "ife_0_gdsc",
        },
        .flags = POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };
 
@@ -2247,6 +2250,7 @@ static struct gdsc ife_1_gdsc = {
                .name = "ife_1_gdsc",
        },
        .flags = POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };