arm64: dts: qcom: sm8550: add QCrypto nodes

Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115-topic-sm8550-upstream-dts-qce-v1-0-fe750dfa90f6@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index ca96789..59756ec 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -1547,6 +1547,30 @@
                        qcom,bcm-voters = <&apps_bcm_voter>;
                };
 
+               cryptobam: dma-controller@1dc4000 {
+                       compatible = "qcom,bam-v1.7.0";
+                       reg = <0x0 0x01dc4000 0x0 0x28000>;
+                       interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                       qcom,controlled-remotely;
+                       iommus = <&apps_smmu 0x480 0x0>,
+                                <&apps_smmu 0x481 0x0>;
+                       interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+                       interconnect-names = "memory";
+               };
+
+               crypto: crypto@1de0000 {
+                       compatible = "qcom,sm8550-qce";
+                       reg = <0x0 0x01dfa000 0x0 0x6000>;
+                       dmas = <&cryptobam 4>, <&cryptobam 5>;
+                       dma-names = "rx", "tx";
+                       iommus = <&apps_smmu 0x480 0x0>,
+                                <&apps_smmu 0x481 0x0>;
+                       interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+                       interconnect-names = "memory";
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0 0x01f40000 0 0x20000>;