clk: sunxi-ng: sun4i: Export video PLLs
authorJonathan Liu <net147@gmail.com>
Tue, 17 Oct 2017 12:18:03 +0000 (20:18 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 17 Oct 2017 17:32:16 +0000 (19:32 +0200)
The video PLLs are used directly by the HDMI controller. Export them so
that we can use them in our DT node.

Signed-off-by: Jonathan Liu <net147@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun4i-a10.h
include/dt-bindings/clock/sun4i-a10-ccu.h

index c5947c7..23c908a 100644 (file)
@@ -29,7 +29,7 @@
 #define CLK_PLL_AUDIO_4X       6
 #define CLK_PLL_AUDIO_8X       7
 #define CLK_PLL_VIDEO0         8
-#define CLK_PLL_VIDEO0_2X      9
+/* The PLL_VIDEO0_2X clock is exported */
 #define CLK_PLL_VE             10
 #define CLK_PLL_DDR_BASE       11
 #define CLK_PLL_DDR            12
@@ -38,7 +38,7 @@
 #define CLK_PLL_PERIPH         15
 #define CLK_PLL_PERIPH_SATA    16
 #define CLK_PLL_VIDEO1         17
-#define CLK_PLL_VIDEO1_2X      18
+/* The PLL_VIDEO1_2X clock is exported */
 #define CLK_PLL_GPU            19
 
 /* The CPU clock is exported */
index c5a53f3..e4fa61b 100644 (file)
@@ -43,6 +43,8 @@
 #define _DT_BINDINGS_CLK_SUN4I_A10_H_
 
 #define CLK_HOSC               1
+#define CLK_PLL_VIDEO0_2X      9
+#define CLK_PLL_VIDEO1_2X      18
 #define CLK_CPU                        20
 
 /* AHB Gates */