+2005-05-07 David Edelsohn <edelsohn@gnu.org>
+
+ * config.gcc ({powerpc,rs6000}-ibm-aix*): Remove rs6000/aix.opt
+ from extra_options.
+ * config.in (HAVE_AS_POPCNTB): New.
+ * configure.ac (HAVE_AS_MFCRF): Add .machine "pwr5" to AIX test.
+ (HAVE_AS_POPCNTB): New.
+ * configure: Regenerated.
+ * config/rs6000/aix.h (TARGET_XL_COMPAT): Delete.
+ * config/rs6000/rs6000.c (rs6000_override_options, power5): Add
+ MASK_POPCNTB. Uncomment rs6000_sched_restricted_insns_priority
+ and rs6000_sched_costly_dep.
+ * config/rs6000/rs6000.h (TARGET_POPCNTB): New.
+ (TARGET_XL_COMPAT): Delete.
+ * config/rs6000/rs6000.md (UNSPEC_POPCNTB): New.
+ (popcount<mode>2): New.
+ (popcntb<mode>2): New.
+ * config/rs6000/rs6000.opt (mpopcntb): New.
+
2005-05-07 Matt Kraai <kraai@ftbfs.org>
* Makefile.in (c-gimplify.o): Depend on $(RTL_H) instead of rtl.h.
rs6000-ibm-aix4.[12]* | powerpc-ibm-aix4.[12]*)
tm_file="${tm_file} rs6000/aix.h rs6000/aix41.h rs6000/xcoff.h"
tmake_file="rs6000/t-fprules rs6000/t-newas"
- extra_options="${extra_options} rs6000/aix.opt rs6000/aix41.opt"
+ extra_options="${extra_options} rs6000/aix41.opt"
use_collect2=yes
extra_headers=
use_fixproto=yes
rs6000-ibm-aix4.[3456789]* | powerpc-ibm-aix4.[3456789]*)
tm_file="rs6000/biarch64.h ${tm_file} rs6000/aix.h rs6000/aix43.h rs6000/xcoff.h"
tmake_file=rs6000/t-aix43
- extra_options="${extra_options} rs6000/aix.opt rs6000/aix64.opt"
+ extra_options="${extra_options} rs6000/aix64.opt"
use_collect2=yes
thread_file='aix'
extra_headers=
;;
rs6000-ibm-aix5.1.* | powerpc-ibm-aix5.1.*)
tm_file="rs6000/biarch64.h ${tm_file} rs6000/aix.h rs6000/aix51.h rs6000/xcoff.h"
- extra_options="${extra_options} rs6000/aix.opt rs6000/aix64.opt"
+ extra_options="${extra_options} rs6000/aix64.opt"
tmake_file=rs6000/t-aix43
use_collect2=yes
thread_file='aix'
rs6000-ibm-aix[56789].* | powerpc-ibm-aix[56789].*)
tm_file="${tm_file} rs6000/aix.h rs6000/aix52.h rs6000/xcoff.h"
tmake_file=rs6000/t-aix52
- extra_options="${extra_options} rs6000/aix.opt rs6000/aix64.opt"
+ extra_options="${extra_options} rs6000/aix64.opt"
use_collect2=yes
thread_file='aix'
extra_headers=
/* Define if your assembler supports offsetable %lo(). */
#undef HAVE_AS_OFFSETABLE_LO10
+/* Define if your assembler supports popcntb field. */
+#undef HAVE_AS_POPCNTB
+
/* Define if your assembler supports .register. */
#undef HAVE_AS_REGISTER_PSEUDO_OP
#define JUMP_TABLES_IN_TEXT_SECTION 1
-/* Enable AIX XL compiler calling convention breakage compatibility. */
-#undef TARGET_XL_COMPAT
-#define TARGET_XL_COMPAT has_xl_compat_option
-
/* Define any extra SPECS that the compiler needs to generate. */
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{"power4", PROCESSOR_POWER4,
POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POWERPC64},
{"power5", PROCESSOR_POWER5,
- POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POWERPC64},
+ POWERPC_BASE_MASK | MASK_POWERPC64 | MASK_PPC_GFXOPT
+ | MASK_MFCRF | MASK_POPCNTB},
{"powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK},
{"powerpc64", PROCESSOR_POWERPC64,
POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
rs6000_sched_groups = (rs6000_cpu == PROCESSOR_POWER4
|| rs6000_cpu == PROCESSOR_POWER5);
- /* ?? I see no need for this. This variable was always initialized to 0,
- except when explicitly set. It's not set in any .h file either.
rs6000_sched_restricted_insns_priority
= (rs6000_sched_groups ? 1 : 0);
- */
/* Handle -msched-costly-dep option. */
- /* ?? Same goes for this. When would rs6000_sched_costly_dep ever have
- a nonzero value upon entry to this function. ??
rs6000_sched_costly_dep
= (rs6000_sched_groups ? store_to_load_dep_costly : no_dep_costly);
- */
+
if (rs6000_sched_costly_dep_str)
{
if (! strcmp (rs6000_sched_costly_dep_str, "no"))
/* Handle -minsert-sched-nops option. */
rs6000_sched_insert_nops
= (rs6000_sched_groups ? sched_finish_regroup_exact : sched_finish_none);
+
if (rs6000_sched_insert_nops_str)
{
if (! strcmp (rs6000_sched_insert_nops_str, "no"))
optional field operand for mfcr. */
#ifndef HAVE_AS_MFCRF
-#undef TARGET_MFCRF
+#undef TARGET_MFCRF
#define TARGET_MFCRF 0
#endif
+/* Define TARGET_POPCNTB if the target assembler does not suppport the
+ popcount byte instruction. */
+
+#ifndef HAVE_AS_POPCNTB
+#undef TARGET_POPCNTB
+#define TARGET_POPCNTB 0
+#endif
+
#define TARGET_32BIT (! TARGET_64BIT)
/* Emit a dtp-relative reference to a TLS variable. */
/* The option machinery will define this. */
#endif
-#define TARGET_XL_COMPAT 0
-
#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING)
/* Processor type. Order must match cpu attribute in MD file. */
(UNSPEC_SYNC_SWAP 35)
(UNSPEC_LWSYNC 36)
(UNSPEC_ISYNC 37)
+ (UNSPEC_POPCNTB 38)
])
;;
operands[5] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode));
})
+(define_expand "popcount<mode>2"
+ [(set (match_dup 2)
+ (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
+ UNSPEC_POPCNTB))
+ (set (match_dup 3)
+ (mult:GPR (match_dup 2) (match_dup 4)))
+ (set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+ (lshiftrt:GPR (match_dup 3) (match_dup 5)))]
+ "TARGET_POPCNTB"
+ {
+ operands[2] = gen_reg_rtx (<MODE>mode);
+ operands[3] = gen_reg_rtx (<MODE>mode);
+ operands[4] = force_reg (<MODE>mode, <MODE>mode == SImode
+ ? GEN_INT (0x01010101)
+ : GEN_INT (0x0101010101010101LL));
+ operands[5] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - 8);
+ })
+
+(define_insn "popcntb<mode>2"
+ [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+ (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
+ UNSPEC_POPCNTB))]
+ "TARGET_POPCNTB"
+ "popcntb %0,%1")
+
(define_expand "mulsi3"
[(use (match_operand:SI 0 "gpc_reg_operand" ""))
(use (match_operand:SI 1 "gpc_reg_operand" ""))
Target Report Mask(POWERPC64)
Use PowerPC-64 instruction set
+mpowerpc-gpopt
+Target Report Mask(PPC_GPOPT)
+Use PowerPC General Purpose group optional instructions
+
+mpowerpc-gfxopt
+Target Report Mask(PPC_GFXOPT)
+Use PowerPC Graphics group optional instructions
+
+mmfcrf
+Target Report Mask(MFCRF)
+Generate single field mfcr instruction
+
+mpopcntb
+Target Report Mask(POPCNTB)
+Use PowerPC/AS popcntb instruction
+
maltivec
Target Report Mask(ALTIVEC)
Use AltiVec instructions
+mmultiple
+Target Report Mask(MULTIPLE)
+Generate load/store multiple instructions
+
+mstring
+Target Report Mask(STRING)
+Generate string instructions for block moves
+
mnew-mnemonics
Target Report RejectNegative Mask(NEW_MNEMONICS)
Use new mnemonics for PowerPC architecture
Target Report RejectNegative InverseMask(NEW_MNEMONICS)
Use old mnemonics for PowerPC architecture
-mno-fp-in-toc
-Target Report RejectNegative Mask(NO_FP_IN_TOC)
-Do not place floating point constants in TOC
-
-mfp-in-toc
-Target Report RejectNegative InverseMask(NO_FP_IN_TOC)
-Place floating point constants in TOC
-
-mno-sum-in-toc
-Target RejectNegative Mask(NO_SUM_IN_TOC)
-Do not place symbol+offset constants in TOC
-
-msum-in-toc
-Target RejectNegative InverseMask(NO_SUM_IN_TOC)
-Place symbol+offset constants in TOC
-
-;; ?? Where should we put documentation like this ??
-;;
-; Output only one TOC entry per module. Normally linking fails if
-; there are more than 16K unique variables/constants in an executable. With
-; this option, linking fails only if there are more than 16K modules, or
-; if there are more than 16K unique variables/constant in a single module.
-;
-; This is at the cost of having 2 extra loads and one extra store per
-; function, and one less allocable register.
-mminimal-toc
-Target Report Mask(MINIMAL_TOC)
-Use only one TOC entry per procedure
-
msoft-float
Target Report RejectNegative Mask(SOFT_FLOAT)
Do not use hardware floating point
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
Use hardware floating point
-mmultiple
-Target Report Mask(MULTIPLE)
-Generate load/store multiple instructions
-
-mstring
-Target Report Mask(STRING)
-Generate string instructions for block moves
-
mno-update
Target Report RejectNegative Mask(NO_UPDATE)
Do not generate load/store with update instructions
Target Report InverseMask(AIX_STRUCT_RET)
Return small structures in registers (SVR4 default)
-mmfcrf
-Target Report Mask(MFCRF)
-Generate single field mfcr instruction
+mxl-compat
+Target Var(TARGET_XL_COMPAT)
+Conform more closely to IBM XLC semantics
-mpowerpc-gpopt
-Target Report Mask(PPC_GPOPT)
-Use PowerPC General Purpose group optional instructions
+mno-fp-in-toc
+Target Report RejectNegative Mask(NO_FP_IN_TOC)
+Do not place floating point constants in TOC
-mpowerpc-gfxopt
-Target Report Mask(PPC_GFXOPT)
-Use PowerPC Graphics group optional instructions
+mfp-in-toc
+Target Report RejectNegative InverseMask(NO_FP_IN_TOC)
+Place floating point constants in TOC
+
+mno-sum-in-toc
+Target RejectNegative Mask(NO_SUM_IN_TOC)
+Do not place symbol+offset constants in TOC
+
+msum-in-toc
+Target RejectNegative InverseMask(NO_SUM_IN_TOC)
+Place symbol+offset constants in TOC
+
+; Output only one TOC entry per module. Normally linking fails if
+; there are more than 16K unique variables/constants in an executable. With
+; this option, linking fails only if there are more than 16K modules, or
+; if there are more than 16K unique variables/constant in a single module.
+;
+; This is at the cost of having 2 extra loads and one extra store per
+; function, and one less allocable register.
+mminimal-toc
+Target Report Mask(MINIMAL_TOC)
+Use only one TOC entry per procedure
mfull-toc
Target Report
powerpc*-*-*)
case $target in
- *-*-aix*) conftest_s=' .csect .text[PR]
+ *-*-aix*) conftest_s=' .machine "pwr5"
+ .csect .text[PR]
mfcr 3,128';;
*-*-darwin*)
echo "$as_me:$LINENO: checking assembler for .machine directive support" >&5
_ACEOF
fi
+
+ case $target in
+ *-*-aix*) conftest_s=' .machine "pwr5"
+ .csect .text[PR]
+ popcntb 3,3';;
+ *) conftest_s=' .machine power5
+ .text
+ popcntb 3,3';;
+ esac
+
+ echo "$as_me:$LINENO: checking assembler for popcntb support" >&5
+echo $ECHO_N "checking assembler for popcntb support... $ECHO_C" >&6
+if test "${gcc_cv_as_powerpc_popcntb+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ gcc_cv_as_powerpc_popcntb=no
+ if test $in_tree_gas = yes; then
+ if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 17 \) \* 1000 + 0`
+ then gcc_cv_as_powerpc_popcntb=yes
+fi
+ elif test x$gcc_cv_as != x; then
+ echo "$conftest_s" > conftest.s
+ if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5'
+ { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }
+ then
+ gcc_cv_as_powerpc_popcntb=yes
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+echo "$as_me:$LINENO: result: $gcc_cv_as_powerpc_popcntb" >&5
+echo "${ECHO_T}$gcc_cv_as_powerpc_popcntb" >&6
+if test $gcc_cv_as_powerpc_popcntb = yes; then
+
+cat >>confdefs.h <<\_ACEOF
+#define HAVE_AS_POPCNTB 1
+_ACEOF
+
+fi
+
;;
mips*-*-*)
powerpc*-*-*)
case $target in
- *-*-aix*) conftest_s=' .csect .text[[PR]]
+ *-*-aix*) conftest_s=' .machine "pwr5"
+ .csect .text[[PR]]
mfcr 3,128';;
*-*-darwin*)
gcc_GAS_CHECK_FEATURE([.machine directive support],
[$conftest_s],,
[AC_DEFINE(HAVE_AS_MFCRF, 1,
[Define if your assembler supports mfcr field.])])
+
+ case $target in
+ *-*-aix*) conftest_s=' .machine "pwr5"
+ .csect .text[[PR]]
+ popcntb 3,3';;
+ *) conftest_s=' .machine power5
+ .text
+ popcntb 3,3';;
+ esac
+
+ gcc_GAS_CHECK_FEATURE([popcntb support],
+ gcc_cv_as_powerpc_popcntb, [2,17,0],,
+ [$conftest_s],,
+ [AC_DEFINE(HAVE_AS_POPCNTB, 1,
+ [Define if your assembler supports popcntb field.])])
+
;;
mips*-*-*)
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