instructions.
In the Btver2 model, there are a few InstRW overrides that don't specify a
ReadAfterLd for the register input operand.
As a result, a few AVX variants of horizontal operations and most vector logic
operations with a folded memory operand don't have a ReadAdvance info associated
to their input register operands.
llvm-svn: 328865
--- /dev/null
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s
+
+vshufps $0, %xmm0, %xmm1, %xmm1
+vhaddps (%rdi), %xmm1, %xmm2
+
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.50 vshufps $0, %xmm0, %xmm1, %xmm1
+# CHECK-NEXT: 1 8 1.00 * vhaddps (%rdi), %xmm1, %xmm2
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 0
+# CHECK-NEXT: Index 0123456789
+# CHECK: [0,0] DeER . . vshufps $0, %xmm0, %xmm1, %xmm1
+# CHECK-NEXT: [0,1] DeeeeeeeeER vhaddps (%rdi), %xmm1, %xmm2
--- /dev/null
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s
+
+vshufps $0, %xmm0, %xmm1, %xmm1
+vhaddps (%rdi), %ymm1, %ymm2
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.50 vshufps $0, %xmm0, %xmm1, %xmm1
+# CHECK-NEXT: 1 8 2.00 * vhaddps (%rdi), %ymm1, %ymm2
+
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01
+# CHECK-NEXT: Index 0123456789
+# CHECK: [0,0] DeER . .. vshufps $0, %xmm0, %xmm1, %xmm1
+# CHECK-NEXT: [0,1] D=eeeeeeeeER vhaddps (%rdi), %ymm1, %ymm2
--- /dev/null
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s
+
+vaddps %xmm0, %xmm0, %xmm1
+vandps (%rdi), %xmm1, %xmm2
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm0, %xmm1
+# CHECK-NEXT: 1 6 1.00 * vandps (%rdi), %xmm1, %xmm2
+
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01
+# CHECK-NEXT: Index 0123456789
+# CHECK: [0,0] DeeeER .. vaddps %xmm0, %xmm0, %xmm1
+# CHECK-NEXT: [0,1] D===eeeeeeER vandps (%rdi), %xmm1, %xmm2
--- /dev/null
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s
+
+vaddps %ymm0, %ymm0, %ymm1
+vandps (%rdi), %ymm1, %ymm2
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 2 3 2.00 vaddps %ymm0, %ymm0, %ymm1
+# CHECK-NEXT: 2 6 2.00 * vandps (%rdi), %ymm1, %ymm2
+
+
+# CHECK: Timeline view:
+# CHECK-NEXT: 01
+# CHECK-NEXT: Index 0123456789
+# CHECK: [0,0] DeeeER .. vaddps %ymm0, %ymm0, %ymm1
+# CHECK-NEXT: [0,1] .D==eeeeeeER vandps (%rdi), %ymm1, %ymm2