gfx: drv: Add PIPE DSL regs

Add defines for display scanline counter registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>

diff --git a/drivers/staging/mrst/drv/psb_intel_reg.h b/drivers/staging/mrst/drv/psb_intel_reg.h
index 208f82e..985da5a 100644 (file)
--- a/drivers/staging/mrst/drv/psb_intel_reg.h
+++ b/drivers/staging/mrst/drv/psb_intel_reg.h
@@ -367,6 +367,10 @@
 # define LVDS_B0B3_POWER_DOWN          (0 << 2)
 # define LVDS_B0B3_POWER_UP            (3 << 2)
 
+#define PIPEA_DSL              0x70000
+#define PIPEB_DSL              0x71000
+#define PIPEC_DSL              0x72000
+
 #define PIPEACONF 0x70008
 #define PIPEACONF_ENABLE       (1<<31)
 #define PIPEACONF_DISABLE      0