that delivers key events when these buttons are pressed.
endif # X86_PLATFORM_DEVICES
+
+config P2SB
+ bool "Primary to Sideband (P2SB) bridge access support"
+ depends on PCI && X86
+ help
+ The Primary to Sideband (P2SB) bridge is an interface to some
+ PCI devices connected through it. In particular, SPI NOR controller
+ in Intel Apollo Lake SoC is one of such devices.
+
+ The main purpose of this library is to unhide P2SB device in case
+ firmware kept it hidden on some platforms in order to access devices
+ behind it.
# Intel uncore drivers
obj-$(CONFIG_INTEL_IPS) += intel_ips.o
+# Intel miscellaneous drivers
+intel_p2sb-y := p2sb.o
+obj-$(CONFIG_P2SB) += intel_p2sb.o
+
# Intel PMIC / PMC / P-Unit devices
obj-$(CONFIG_INTEL_SCU_IPC) += intel_scu_ipc.o
obj-$(CONFIG_INTEL_SCU_PCI) += intel_scu_pcidrv.o
enable/disable the Camera, WiFi, BT etc. devices. If in doubt, say Y
here; it will only load on supported platforms.
-config P2SB
- bool "Primary to Sideband (P2SB) bridge access support"
- depends on PCI
- help
- The Primary to Sideband (P2SB) bridge is an interface to some
- PCI devices connected through it. In particular, SPI NOR controller
- in Intel Apollo Lake SoC is one of such devices.
-
- The main purpose of this library is to unhide P2SB device in case
- firmware kept it hidden on some platforms in order to access devices
- behind it.
-
config INTEL_BXTWC_PMIC_TMU
tristate "Intel Broxton Whiskey Cove TMU Driver"
depends on INTEL_SOC_PMIC_BXTWC
obj-$(CONFIG_INTEL_INT0002_VGPIO) += intel_int0002_vgpio.o
intel_oaktrail-y := oaktrail.o
obj-$(CONFIG_INTEL_OAKTRAIL) += intel_oaktrail.o
-intel_p2sb-y := p2sb.o
-obj-$(CONFIG_P2SB) += intel_p2sb.o
intel_sdsi-y := sdsi.o
obj-$(CONFIG_INTEL_SDSI) += intel_sdsi.o
intel_vsec-y := vsec.o