unsigned int rev;
};
- struct device;
-
- enum ucode_state {
- UCODE_OK = 0,
- UCODE_NEW,
- UCODE_UPDATED,
- UCODE_NFOUND,
- UCODE_ERROR,
+ struct ucode_cpu_info {
+ struct cpu_signature cpu_sig;
+ void *mc;
};
- struct microcode_ops {
- enum ucode_state (*request_microcode_fw) (int cpu, struct device *);
-
- void (*microcode_fini_cpu) (int cpu);
+ #ifdef CONFIG_MICROCODE
+ void load_ucode_bsp(void);
+ void load_ucode_ap(void);
+ void microcode_bsp_resume(void);
+ #else
+ static inline void load_ucode_bsp(void) { }
+ static inline void load_ucode_ap(void) { }
+ static inline void microcode_bsp_resume(void) { }
+ #endif
- /*
- * The generic 'microcode_core' part guarantees that
- * the callbacks below run on a target cpu when they
- * are being called.
- * See also the "Synchronization" section in microcode_core.c.
- */
- enum ucode_state (*apply_microcode) (int cpu);
- int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
+ #ifdef CONFIG_CPU_SUP_INTEL
+ /* Intel specific microcode defines. Public for IFS */
+ struct microcode_header_intel {
+ unsigned int hdrver;
+ unsigned int rev;
+ unsigned int date;
+ unsigned int sig;
+ unsigned int cksum;
+ unsigned int ldrver;
+ unsigned int pf;
+ unsigned int datasize;
+ unsigned int totalsize;
+ unsigned int metasize;
+ unsigned int reserved[2];
};
- struct ucode_cpu_info {
- struct cpu_signature cpu_sig;
- void *mc;
+ struct microcode_intel {
+ struct microcode_header_intel hdr;
+ unsigned int bits[];
};
- extern struct ucode_cpu_info ucode_cpu_info[];
- struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa);
- #ifdef CONFIG_MICROCODE_INTEL
- extern struct microcode_ops * __init init_intel_microcode(void);
- #else
- static inline struct microcode_ops * __init init_intel_microcode(void)
- {
- return NULL;
- }
- #endif /* CONFIG_MICROCODE_INTEL */
+ #define DEFAULT_UCODE_DATASIZE (2000)
+ #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
+ #define MC_HEADER_TYPE_MICROCODE 1
+ #define MC_HEADER_TYPE_IFS 2
- #ifdef CONFIG_MICROCODE_AMD
- extern struct microcode_ops * __init init_amd_microcode(void);
- extern void __exit exit_amd_microcode(void);
- #else
- static inline struct microcode_ops * __init init_amd_microcode(void)
+ static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
{
- return NULL;
+ return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
}
- static inline void __exit exit_amd_microcode(void) {}
- #endif
- #define MAX_UCODE_COUNT 128
-
- #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
- #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
- #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
- #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
- #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
- #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
- #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
-
- #define CPUID_IS(a, b, c, ebx, ecx, edx) \
- (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
-
- /*
- * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
- * x86_cpuid_vendor() gets vendor id for BSP.
- *
- * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
- * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
- *
- * x86_cpuid_vendor() gets vendor information directly from CPUID.
- */
- static inline int x86_cpuid_vendor(void)
+ static inline u32 intel_get_microcode_revision(void)
{
- u32 eax = 0x00000000;
- u32 ebx, ecx = 0, edx;
+ u32 rev, dummy;
- native_cpuid(&eax, &ebx, &ecx, &edx);
+ native_wrmsrl(MSR_IA32_UCODE_REV, 0);
- if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
- return X86_VENDOR_INTEL;
+ /* As documented in the SDM: Do a CPUID 1 here */
+ native_cpuid_eax(1);
- if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
- return X86_VENDOR_AMD;
+ /* get the current revision from MSR 0x8B */
+ native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
- return X86_VENDOR_UNKNOWN;
+ return rev;
}
- static inline unsigned int x86_cpuid_family(void)
- {
- u32 eax = 0x00000001;
- u32 ebx, ecx = 0, edx;
-
- native_cpuid(&eax, &ebx, &ecx, &edx);
+ void show_ucode_info_early(void);
- return x86_family(eax);
- }
+ #else /* CONFIG_CPU_SUP_INTEL */
+ static inline void show_ucode_info_early(void) { }
+ #endif /* !CONFIG_CPU_SUP_INTEL */
- #ifdef CONFIG_MICROCODE
- extern void __init load_ucode_bsp(void);
- extern void load_ucode_ap(void);
- void reload_early_microcode(unsigned int cpu);
- extern bool initrd_gone;
- void microcode_bsp_resume(void);
- #else
- static inline void __init load_ucode_bsp(void) { }
- static inline void load_ucode_ap(void) { }
- static inline void reload_early_microcode(unsigned int cpu) { }
- static inline void microcode_bsp_resume(void) { }
++#ifdef CONFIG_CPU_SUP_AMD
++void amd_check_microcode(void);
++#else /* CONFIG_CPU_SUP_AMD */
++static inline void amd_check_microcode(void) {}
+#endif
+
#endif /* _ASM_X86_MICROCODE_H */