select SSCANF
imply OF_HAS_PRIOR_STAGE
+config ARCH_GXP
+ bool "Support HPE GXP SoCs"
+ select DM
+ select OF_CONTROL
+ imply CMD_DM
+
endchoice
config SUPPORT_PASSING_ATAGS
source "arch/arm/mach-exynos/Kconfig"
+source "arch/arm/mach-hpe/gxp/Kconfig"
+
source "arch/arm/mach-highbank/Kconfig"
source "arch/arm/mach-integrator/Kconfig"
machine-$(CONFIG_ARCH_BCMSTB) += bcmstb
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_EXYNOS) += exynos
+machine-$(CONFIG_ARCH_GXP) += hpe
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx
machine-$(CONFIG_ARCH_K3) += k3
--- /dev/null
+obj-$(CONFIG_SOC_GXP) += gxp/
--- /dev/null
+if ARCH_GXP
+
+config SOC_GXP
+ bool
+ select CPU_V7A
+
+source "board/hpe/gxp/Kconfig"
+
+endif
--- /dev/null
+obj-y += reset.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * GXP driver
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#include <asm/io.h>
+
+#define GXP_CCR 0xc0000000
+
+/* empty to satisfy current lowlevel_init, can be removed any time */
+void lowlevel_init(void)
+{
+}
+
+void reset_cpu(ulong ignored)
+{
+ writel(1, GXP_CCR);
+
+ while (1)
+ ; /* loop forever till reset */
+}