arm64: zynqmp: Rename zc1275 to zcu1275
authorMichal Simek <michal.simek@xilinx.com>
Tue, 21 May 2019 10:07:23 +0000 (12:07 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 30 Jul 2019 08:20:06 +0000 (10:20 +0200)
Name of this platform has changed and released to customers that's why
name has also changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: uboot

arch/arm/dts/Makefile
arch/arm/dts/zynqmp-zcu1275-revA.dts [moved from arch/arm/dts/zynqmp-zc1275-revA.dts with 89% similarity]
arch/arm/dts/zynqmp-zcu1275-revB.dts [moved from arch/arm/dts/zynqmp-zc1275-revB.dts with 89% similarity]
configs/xilinx_zynqmp_zcu1275_revA_defconfig [moved from configs/xilinx_zynqmp_zc1275_revA_defconfig with 96% similarity]
configs/xilinx_zynqmp_zcu1275_revB_defconfig [moved from configs/xilinx_zynqmp_zc1275_revB_defconfig with 96% similarity]

index b437f75..ff18197 100644 (file)
@@ -253,10 +253,10 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
        zynqmp-zcu104-revC.dtb                  \
        zynqmp-zcu106-revA.dtb                  \
        zynqmp-zcu111-revA.dtb                  \
+       zynqmp-zcu1275-revA.dtb                 \
+       zynqmp-zcu1275-revB.dtb                 \
        zynqmp-zc1232-revA.dtb                  \
        zynqmp-zc1254-revA.dtb                  \
-       zynqmp-zc1275-revA.dtb                  \
-       zynqmp-zc1275-revB.dtb                  \
        zynqmp-zc1751-xm015-dc1.dtb             \
        zynqmp-zc1751-xm016-dc2.dtb             \
        zynqmp-zc1751-xm017-dc3.dtb             \
similarity index 89%
rename from arch/arm/dts/zynqmp-zc1275-revA.dts
rename to arch/arm/dts/zynqmp-zcu1275-revA.dts
index 82c30a3..c22de57 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * dts file for Xilinx ZynqMP ZC1275
+ * dts file for Xilinx ZynqMP ZCU1275
  *
  * (C) Copyright 2017 - 2018, Xilinx, Inc.
  *
@@ -14,8 +14,9 @@
 #include "zynqmp-clk-ccf.dtsi"
 
 / {
-       model = "ZynqMP ZC1275 RevA";
-       compatible = "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
+       model = "ZynqMP ZCU1275 RevA";
+       compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275",
+                    "xlnx,zynqmp";
 
        aliases {
                serial0 = &uart0;
similarity index 89%
rename from arch/arm/dts/zynqmp-zc1275-revB.dts
rename to arch/arm/dts/zynqmp-zcu1275-revB.dts
index 0473503..34c4bec 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * dts file for Xilinx ZynqMP ZC1275 RevB
+ * dts file for Xilinx ZynqMP ZCU1275 RevB
  *
  * (C) Copyright 2018, Xilinx, Inc.
  *
@@ -14,8 +14,9 @@
 #include "zynqmp-clk-ccf.dtsi"
 
 / {
-       model = "ZynqMP ZC1275 RevB";
-       compatible = "xlnx,zynqmp-zc1275-revB", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
+       model = "ZynqMP ZCU1275 RevB";
+       compatible = "xlnx,zynqmp-zcu1275-revB", "xlnx,zynqmp-zcu1275",
+                    "xlnx,zynqmp";
 
        aliases {
                serial0 = &uart0;
similarity index 96%
rename from configs/xilinx_zynqmp_zc1275_revA_defconfig
rename to configs/xilinx_zynqmp_zcu1275_revA_defconfig
index ed6c1b8..c73a97a 100644 (file)
@@ -30,7 +30,7 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revA"
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu1275-revA"
 CONFIG_SPL_DM=y
 CONFIG_CLK_ZYNQMP=y
 CONFIG_FPGA_XILINX=y
similarity index 96%
rename from configs/xilinx_zynqmp_zc1275_revB_defconfig
rename to configs/xilinx_zynqmp_zcu1275_revB_defconfig
index 0c2491a..0d4302e 100644 (file)
@@ -31,7 +31,7 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revB"
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu1275-revB"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_CLK_ZYNQMP=y