s5pc210: add system clock setting (pclock)

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S
index e2fca35..249f376 100644 (file)
--- a/board/samsung/universal_c210/lowlevel_init.S
+++ b/board/samsung/universal_c210/lowlevel_init.S
@@ -75,6 +75,9 @@ lowlevel_init:
        add     r1, r0, r3
        str     r2, [r1]
 
+       /* init system clock */
+       bl      system_clock_init
+
        /* UART */
        bl      uart_asm_init
 
@@ -96,14 +99,6 @@ uart_asm_init:
        ldr     r1, =0x00223322
        str     r1, [r0, #0x20]                 @ S5PC210_GPIO_A1_OFFSET
 
-       ldr     r0, =0x10030000
-       ldr     r1, =0x666666
-       ldr     r2, =0x0C250                    @ CLK_SRC_PERIL0_OFFSET
-       str     r1, [r0, r2]
-       ldr     r1, =0x777777
-       ldr     r2, =0x0C550                    @ CLK_DIV_PERIL0_OFFSET
-       str     r1, [r0, r2]
-
        /* UART_SEL GPY4[7] (part2) at S5PC210 */
        add     r0, r8, #0x1A0                  @ S5PC210_GPIO_Y4_OFFSET
        ldr     r1, [r0, #0x0]
@@ -141,3 +136,18 @@ uart_asm_init:
 #endif
 
        mov     pc, lr
+
+system_clock_init:
+       ldr     r0, =S5PC210_CLOCK_BASE
+
+       ldr     r1, =0x6666666
+       ldr     r2, =0x0C250                    @ CLK_SRC_PERIL0_OFFSET
+       str     r1, [r0, r2]
+       ldr     r1, =0x777777
+       ldr     r2, =0x0C550                    @ CLK_DIV_PERIL0_OFFSET
+       str     r1, [r0, r2]
+       ldr     r1, =0x8
+       ldr     r2, =0x0C55C                    @ CLK_DIV_PERIL3_OFFSET
+       str     r1, [r0, r2]
+
+       mov     pc, lr