drm/etnaviv: add missing quirks for GC300

[ Upstream commit cc7d3fb446a91f24978a6aa59cbb578f92e22242 ]

The GC300's features register doesn't specify that a 2D pipe is
available, and like the GC600, its idle register reports zero bits where
modules aren't present.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
(cherry picked from commit e025348004b268a5f9cff04efb869504bc75203e)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index c2ed9529774287ca7f4026e6abb1c443bce56f19..8baa59fb32f2d5732b70f4ac65b92826e3a0f758 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -404,6 +404,12 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
        if (gpu->identity.model == chipModel_GC700)
                gpu->identity.features &= ~chipFeatures_FAST_CLEAR;
 
+       /* These models/revisions don't have the 2D pipe bit */
+       if ((gpu->identity.model == chipModel_GC500 &&
+            gpu->identity.revision <= 2) ||
+           gpu->identity.model == chipModel_GC300)
+               gpu->identity.features |= chipFeatures_PIPE_2D;
+
        if ((gpu->identity.model == chipModel_GC500 &&
             gpu->identity.revision < 2) ||
            (gpu->identity.model == chipModel_GC300 &&
@@ -437,8 +443,9 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
                                gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_5);
        }
 
-       /* GC600 idle register reports zero bits where modules aren't present */
-       if (gpu->identity.model == chipModel_GC600)
+       /* GC600/300 idle register reports zero bits where modules aren't present */
+       if (gpu->identity.model == chipModel_GC600 ||
+           gpu->identity.model == chipModel_GC300)
                gpu->idle_mask = VIVS_HI_IDLE_STATE_TX |
                                 VIVS_HI_IDLE_STATE_RA |
                                 VIVS_HI_IDLE_STATE_SE |