Lower waste from alignment of deferred code blocks.

Some ARM chips load instructions 8 byte at a time.

Review URL: http://codereview.chromium.org/2809029

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4920 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
index c16d6ec..f8d98db 100644 (file)
--- a/src/arm/assembler-arm.cc
+++ b/src/arm/assembler-arm.cc
@@ -395,7 +395,8 @@ void Assembler::Align(int m) {
 
 
 void Assembler::CodeTargetAlign() {
-  Align(16);  // Tentative value.
+  // Preferred alignment of jump targets on some ARM chips.
+  Align(8);
 }
 
 

diff --git a/src/codegen.cc b/src/codegen.cc
index 2cacf24..686e173 100644 (file)
--- a/src/codegen.cc
+++ b/src/codegen.cc
@@ -69,7 +69,6 @@ void CodeGenerator::ProcessDeferred() {
   while (!deferred_.is_empty()) {
     DeferredCode* code = deferred_.RemoveLast();
     ASSERT(masm_ == code->masm());
-    masm_->CodeTargetAlign();
     // Record position of deferred code stub.
     masm_->RecordStatementPosition(code->statement_position());
     if (code->position() != RelocInfo::kNoPosition) {