soc: renesas: rcar-sysc: add R8A77980 support
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fri, 16 Feb 2018 18:28:02 +0000 (21:28 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 19 Feb 2018 19:50:44 +0000 (20:50 +0100)
Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC
driver.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
drivers/soc/renesas/Kconfig
drivers/soc/renesas/Makefile
drivers/soc/renesas/r8a77980-sysc.c [new file with mode: 0644]
drivers/soc/renesas/rcar-sysc.c
drivers/soc/renesas/rcar-sysc.h

index 8690f10..6284a95 100644 (file)
@@ -18,6 +18,7 @@ Required properties:
       - "renesas,r8a7795-sysc" (R-Car H3)
       - "renesas,r8a7796-sysc" (R-Car M3-W)
       - "renesas,r8a77970-sysc" (R-Car V3M)
+      - "renesas,r8a77980-sysc" (R-Car V3H)
       - "renesas,r8a77995-sysc" (R-Car D3)
   - reg: Address start and address range for the device.
   - #power-domain-cells: Must be 1.
index 6efd7be..6caa393 100644 (file)
@@ -15,6 +15,7 @@ config SOC_RENESAS
        select SYSC_R8A7795 if ARCH_R8A7795
        select SYSC_R8A7796 if ARCH_R8A7796
        select SYSC_R8A77970 if ARCH_R8A77970
+       select SYSC_R8A77980 if ARCH_R8A77980
        select SYSC_R8A77995 if ARCH_R8A77995
 
 if SOC_RENESAS
@@ -60,6 +61,10 @@ config SYSC_R8A77970
        bool "R-Car V3M System Controller support" if COMPILE_TEST
        select SYSC_RCAR
 
+config SYSC_R8A77980
+       bool "R-Car V3H System Controller support" if COMPILE_TEST
+       select SYSC_RCAR
+
 config SYSC_R8A77995
        bool "R-Car D3 System Controller support" if COMPILE_TEST
        select SYSC_RCAR
index 845d62a..d3b7bb3 100644 (file)
@@ -13,6 +13,7 @@ obj-$(CONFIG_SYSC_R8A7794)    += r8a7794-sysc.o
 obj-$(CONFIG_SYSC_R8A7795)     += r8a7795-sysc.o
 obj-$(CONFIG_SYSC_R8A7796)     += r8a7796-sysc.o
 obj-$(CONFIG_SYSC_R8A77970)    += r8a77970-sysc.o
+obj-$(CONFIG_SYSC_R8A77980)    += r8a77980-sysc.o
 obj-$(CONFIG_SYSC_R8A77995)    += r8a77995-sysc.o
 
 # Family
diff --git a/drivers/soc/renesas/r8a77980-sysc.c b/drivers/soc/renesas/r8a77980-sysc.c
new file mode 100644 (file)
index 0000000..9265fb5
--- /dev/null
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas R-Car V3H System Controller
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a77980-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77980_areas[] __initconst = {
+       { "always-on",      0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+       { "ca53-scu",   0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON,
+         PD_SCU },
+       { "ca53-cpu0",  0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU,
+         PD_CPU_NOCR },
+       { "ca53-cpu1",  0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU,
+         PD_CPU_NOCR },
+       { "ca53-cpu2",  0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU,
+         PD_CPU_NOCR },
+       { "ca53-cpu3",  0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU,
+         PD_CPU_NOCR },
+       { "cr7",        0x240, 0, R8A77980_PD_CR7,      R8A77980_PD_ALWAYS_ON },
+       { "a3ir",       0x180, 0, R8A77980_PD_A3IR,     R8A77980_PD_ALWAYS_ON },
+       { "a2ir0",      0x400, 0, R8A77980_PD_A2IR0,    R8A77980_PD_A3IR },
+       { "a2ir1",      0x400, 1, R8A77980_PD_A2IR1,    R8A77980_PD_A3IR },
+       { "a2ir2",      0x400, 2, R8A77980_PD_A2IR2,    R8A77980_PD_A3IR },
+       { "a2ir3",      0x400, 3, R8A77980_PD_A2IR3,    R8A77980_PD_A3IR },
+       { "a2ir4",      0x400, 4, R8A77980_PD_A2IR4,    R8A77980_PD_A3IR },
+       { "a2ir5",      0x400, 5, R8A77980_PD_A2IR5,    R8A77980_PD_A3IR },
+       { "a2sc0",      0x400, 6, R8A77980_PD_A2SC0,    R8A77980_PD_A3IR },
+       { "a2sc1",      0x400, 7, R8A77980_PD_A2SC1,    R8A77980_PD_A3IR },
+       { "a2sc2",      0x400, 8, R8A77980_PD_A2SC2,    R8A77980_PD_A3IR },
+       { "a2sc3",      0x400, 9, R8A77980_PD_A2SC3,    R8A77980_PD_A3IR },
+       { "a2sc4",      0x400, 10, R8A77980_PD_A2SC4,   R8A77980_PD_A3IR },
+       { "a2pd0",      0x400, 11, R8A77980_PD_A2PD0,   R8A77980_PD_A3IR },
+       { "a2pd1",      0x400, 12, R8A77980_PD_A2PD1,   R8A77980_PD_A3IR },
+       { "a2cn",       0x400, 13, R8A77980_PD_A2CN,    R8A77980_PD_A3IR },
+       { "a3vip",      0x2c0, 0, R8A77980_PD_A3VIP,    R8A77980_PD_ALWAYS_ON },
+       { "a3vip1",     0x300, 0, R8A77980_PD_A3VIP1,   R8A77980_PD_A3VIP },
+       { "a3vip2",     0x280, 0, R8A77980_PD_A3VIP2,   R8A77980_PD_A3VIP },
+};
+
+const struct rcar_sysc_info r8a77980_sysc_info __initconst = {
+       .areas = r8a77980_areas,
+       .num_areas = ARRAY_SIZE(r8a77980_areas),
+};
index 636872b..72b0f4a 100644 (file)
@@ -287,6 +287,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 #ifdef CONFIG_SYSC_R8A77970
        { .compatible = "renesas,r8a77970-sysc", .data = &r8a77970_sysc_info },
 #endif
+#ifdef CONFIG_SYSC_R8A77980
+       { .compatible = "renesas,r8a77980-sysc", .data = &r8a77980_sysc_info },
+#endif
 #ifdef CONFIG_SYSC_R8A77995
        { .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info },
 #endif
index 9d9daf9..974b186 100644 (file)
@@ -59,6 +59,7 @@ extern const struct rcar_sysc_info r8a7794_sysc_info;
 extern const struct rcar_sysc_info r8a7795_sysc_info;
 extern const struct rcar_sysc_info r8a7796_sysc_info;
 extern const struct rcar_sysc_info r8a77970_sysc_info;
+extern const struct rcar_sysc_info r8a77980_sysc_info;
 extern const struct rcar_sysc_info r8a77995_sysc_info;