pop = NULL;
gcc_assert (!TARGET_64BIT || !pop);
+ rtx addr = XEXP (fnaddr, 0);
if (TARGET_MACHO && !TARGET_64BIT)
{
#if TARGET_MACHO
/* Static functions and indirect calls don't need the pic register. Also,
check if PLT was explicitly avoided via no-plt or "noplt" attribute, making
it an indirect call. */
- rtx addr = XEXP (fnaddr, 0);
if (flag_pic
&& GET_CODE (addr) == SYMBOL_REF
&& !SYMBOL_REF_LOCAL_P (addr))
}
}
+ if (TARGET_MACHO && TARGET_64BIT && !sibcall
+ && ((GET_CODE (addr) == SYMBOL_REF && !SYMBOL_REF_LOCAL_P (addr))
+ || !fndecl || TREE_PUBLIC (fndecl)))
+ {
+ /* We allow public functions defined in a TU to bind locally for PIC
+ code (the default) on 64bit Mach-O.
+ If such functions are not inlined, we cannot tell at compile-time if
+ they will be called via the lazy symbol resolver (this can depend on
+ options given at link-time). Therefore, we must assume that the lazy
+ resolver could be used which clobbers R11 and R10. */
+ clobber_reg (&use, gen_rtx_REG (DImode, R11_REG));
+ clobber_reg (&use, gen_rtx_REG (DImode, R10_REG));
+ }
+
if (vec_len > 1)
call = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (vec_len, vec));
rtx_insn *call_insn = emit_call_insn (call);