intel/blorp: add a new flag to communicate PSS sync need
authorTapani Pälli <tapani.palli@intel.com>
Thu, 8 Sep 2022 11:28:29 +0000 (14:28 +0300)
committerMarge Bot <emma+marge@anholt.net>
Fri, 11 Aug 2023 07:15:48 +0000 (07:15 +0000)
This is required for Wa_18019816803 when blorp emit DS state.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>

src/intel/blorp/blorp.h
src/intel/blorp/blorp_genX_exec.h

index 7f5f24b..21cb360 100644 (file)
@@ -109,6 +109,9 @@ enum blorp_batch_flags {
 
    /** Use the hardware blitter to perform any operations in this batch */
    BLORP_BATCH_USE_BLITTER = (1 << 4),
+
+   /** Need a PSS Stall Sync, Wa_18019816803. */
+   BLORP_BATCH_NEED_PSS_STALL_SYNC = (1 << 5),
 };
 
 struct blorp_batch {
index 8f60585..04030de 100644 (file)
@@ -1249,6 +1249,18 @@ blorp_emit_depth_stencil_state(struct blorp_batch *batch,
       return 0;
 
    GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dw, &ds);
+
+#if INTEL_NEEDS_WA_18019816803
+   /* Check if need PSS Stall sync. */
+   if (intel_needs_workaround(batch->blorp->compiler->devinfo, 18019816803) &&
+       batch->flags & BLORP_BATCH_NEED_PSS_STALL_SYNC) {
+      blorp_emit(batch, GENX(PIPE_CONTROL), pc) {
+            pc.PSSStallSyncEnable = true;
+      }
+      batch->flags &= ~BLORP_BATCH_NEED_PSS_STALL_SYNC;
+   }
+#endif
+
 #else
    uint32_t offset;
    void *state = blorp_alloc_dynamic_state(batch,