unsigned int i;
u32 mask = 0;
- for (i = 0; i < I915_PMU_MAX_GTS; i++)
+ for (i = 0; i < I915_PMU_MAX_GT; i++)
mask |= config_mask(__I915_PMU_ACTUAL_FREQUENCY(i)) |
config_mask(__I915_PMU_REQUESTED_FREQUENCY(i));
__I915_NUM_PMU_SAMPLERS
};
-#define I915_PMU_MAX_GTS 2
+#define I915_PMU_MAX_GT 2
/*
* How many different events we track in the global PMU mask.
*/
#define I915_PMU_MASK_BITS \
(I915_ENGINE_SAMPLE_COUNT + \
- I915_PMU_MAX_GTS * __I915_PMU_TRACKED_EVENT_COUNT)
+ I915_PMU_MAX_GT * __I915_PMU_TRACKED_EVENT_COUNT)
#define I915_ENGINE_SAMPLE_COUNT (I915_SAMPLE_SEMA + 1)
* Only global counters are held here, while the per-engine ones are in
* struct intel_engine_cs.
*/
- struct i915_pmu_sample sample[I915_PMU_MAX_GTS][__I915_NUM_PMU_SAMPLERS];
+ struct i915_pmu_sample sample[I915_PMU_MAX_GT][__I915_NUM_PMU_SAMPLERS];
/**
* @sleep_last: Last time GT parked for RC6 estimation.
*/
- ktime_t sleep_last[I915_PMU_MAX_GTS];
+ ktime_t sleep_last[I915_PMU_MAX_GT];
/**
* @irq_count: Number of interrupts
*