ARM: OMAP2+: Update 81xx clock and power domains for default, active and sgx

These offsets seem to be common, so let's rename the defines. And let's
set up the default_l3_slow_81xx_clkdm with active and default powerdomains
for dm814x. These are needed for usb to work.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clockdomains81xx_data.c b/arch/arm/mach-omap2/clockdomains81xx_data.c
index 53442c86a8208fad0bc62a5921dcbbe64fcf3f30..3b5fb05ae7017341b81a009e9e96ca36adc9b8ad 100644 (file)
--- a/arch/arm/mach-omap2/clockdomains81xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains81xx_data.c
@@ -83,6 +83,14 @@ static struct clockdomain mmu_cfg_81xx_clkdm = {
        .flags          = CLKDM_CAN_SWSUP,
 };
 
+static struct clockdomain default_l3_slow_81xx_clkdm = {
+       .name           = "default_l3_slow_clkdm",
+       .pwrdm          = { .name = "default_pwrdm" },
+       .cm_inst        = TI81XX_CM_DEFAULT_MOD,
+       .clkdm_offs     = TI816X_CM_DEFAULT_L3_SLOW_CLKDM,
+       .flags          = CLKDM_CAN_SWSUP,
+};
+
 /* 816x only */
 
 static struct clockdomain alwon_mpu_816x_clkdm = {
@@ -96,7 +104,7 @@ static struct clockdomain alwon_mpu_816x_clkdm = {
 static struct clockdomain active_gem_816x_clkdm = {
        .name           = "active_gem_clkdm",
        .pwrdm          = { .name = "active_pwrdm" },
-       .cm_inst        = TI816X_CM_ACTIVE_MOD,
+       .cm_inst        = TI81XX_CM_ACTIVE_MOD,
        .clkdm_offs     = TI816X_CM_ACTIVE_GEM_CLKDM,
        .flags          = CLKDM_CAN_SWSUP,
 };
@@ -128,7 +136,7 @@ static struct clockdomain ivahd2_816x_clkdm = {
 static struct clockdomain sgx_816x_clkdm = {
        .name           = "sgx_clkdm",
        .pwrdm          = { .name = "sgx_pwrdm" },
-       .cm_inst        = TI816X_CM_SGX_MOD,
+       .cm_inst        = TI81XX_CM_SGX_MOD,
        .clkdm_offs     = TI816X_CM_SGX_CLKDM,
        .flags          = CLKDM_CAN_SWSUP,
 };
@@ -136,7 +144,7 @@ static struct clockdomain sgx_816x_clkdm = {
 static struct clockdomain default_l3_med_816x_clkdm = {
        .name           = "default_l3_med_clkdm",
        .pwrdm          = { .name = "default_pwrdm" },
-       .cm_inst        = TI816X_CM_DEFAULT_MOD,
+       .cm_inst        = TI81XX_CM_DEFAULT_MOD,
        .clkdm_offs     = TI816X_CM_DEFAULT_L3_MED_CLKDM,
        .flags          = CLKDM_CAN_SWSUP,
 };
@@ -144,7 +152,7 @@ static struct clockdomain default_l3_med_816x_clkdm = {
 static struct clockdomain default_ducati_816x_clkdm = {
        .name           = "default_ducati_clkdm",
        .pwrdm          = { .name = "default_pwrdm" },
-       .cm_inst        = TI816X_CM_DEFAULT_MOD,
+       .cm_inst        = TI81XX_CM_DEFAULT_MOD,
        .clkdm_offs     = TI816X_CM_DEFAULT_DUCATI_CLKDM,
        .flags          = CLKDM_CAN_SWSUP,
 };
@@ -152,19 +160,11 @@ static struct clockdomain default_ducati_816x_clkdm = {
 static struct clockdomain default_pci_816x_clkdm = {
        .name           = "default_pci_clkdm",
        .pwrdm          = { .name = "default_pwrdm" },
-       .cm_inst        = TI816X_CM_DEFAULT_MOD,
+       .cm_inst        = TI81XX_CM_DEFAULT_MOD,
        .clkdm_offs     = TI816X_CM_DEFAULT_PCI_CLKDM,
        .flags          = CLKDM_CAN_SWSUP,
 };
 
-static struct clockdomain default_l3_slow_816x_clkdm = {
-       .name           = "default_l3_slow_clkdm",
-       .pwrdm          = { .name = "default_pwrdm" },
-       .cm_inst        = TI816X_CM_DEFAULT_MOD,
-       .clkdm_offs     = TI816X_CM_DEFAULT_L3_SLOW_CLKDM,
-       .flags          = CLKDM_CAN_SWSUP,
-};
-
 static struct clockdomain *clockdomains_ti814x[] __initdata = {
        &alwon_l3_slow_81xx_clkdm,
        &alwon_l3_med_81xx_clkdm,
@@ -172,6 +172,7 @@ static struct clockdomain *clockdomains_ti814x[] __initdata = {
        &alwon_ethernet_81xx_clkdm,
        &mmu_81xx_clkdm,
        &mmu_cfg_81xx_clkdm,
+       &default_l3_slow_81xx_clkdm,
        NULL,
 };
 
@@ -198,7 +199,7 @@ static struct clockdomain *clockdomains_ti816x[] __initdata = {
        &default_l3_med_816x_clkdm,
        &default_ducati_816x_clkdm,
        &default_pci_816x_clkdm,
-       &default_l3_slow_816x_clkdm,
+       &default_l3_slow_81xx_clkdm,
        NULL,
 };
 

diff --git a/arch/arm/mach-omap2/cm81xx.h b/arch/arm/mach-omap2/cm81xx.h
index 45cb407da222bf473d7da4c87bc91a31fed0a809..3a0ccf07c76feae7e2e683f6fb7636a6b973cfce 100644 (file)
--- a/arch/arm/mach-omap2/cm81xx.h
+++ b/arch/arm/mach-omap2/cm81xx.h
@@ -18,15 +18,15 @@
 #define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
 
 /* TI81XX common CM module offsets */
+#define TI81XX_CM_ACTIVE_MOD                   0x0400  /* 256B */
+#define TI81XX_CM_DEFAULT_MOD                  0x0500  /* 256B */
 #define TI81XX_CM_ALWON_MOD                    0x1400  /* 1KB */
+#define TI81XX_CM_SGX_MOD                      0x0900  /* 256B */
 
 /* TI816X CM module offsets */
-#define TI816X_CM_ACTIVE_MOD                   0x0400  /* 256B */
-#define TI816X_CM_DEFAULT_MOD                  0x0500  /* 256B */
 #define TI816X_CM_IVAHD0_MOD                   0x0600  /* 256B */
 #define TI816X_CM_IVAHD1_MOD                   0x0700  /* 256B */
 #define TI816X_CM_IVAHD2_MOD                   0x0800  /* 256B */
-#define TI816X_CM_SGX_MOD                      0x0900  /* 256B */
 
 /* ALWON */
 #define TI81XX_CM_ALWON_L3_SLOW_CLKDM          0x0000

diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 2e00c7f1f4714a822329e6e4a7e8335223c83970..eb27ae066292f98be07c87c97be4df642b64d178 100644 (file)
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -384,14 +384,14 @@ static struct powerdomain isp_814x_pwrdm = {
        .voltdm         = { .name = "core" },
 };
 
-static struct powerdomain active_816x_pwrdm = {
+static struct powerdomain active_81xx_pwrdm = {
        .name             = "active_pwrdm",
        .prcm_offs        = TI816X_PRM_ACTIVE_MOD,
        .pwrsts           = PWRSTS_OFF_ON,
        .voltdm           = { .name = "core" },
 };
 
-static struct powerdomain default_816x_pwrdm = {
+static struct powerdomain default_81xx_pwrdm = {
        .name             = "default_pwrdm",
        .prcm_offs        = TI81XX_PRM_DEFAULT_MOD,
        .pwrsts           = PWRSTS_OFF_ON,
@@ -486,6 +486,8 @@ static struct powerdomain *powerdomains_am35x[] __initdata = {
 static struct powerdomain *powerdomains_ti814x[] __initdata = {
        &alwon_81xx_pwrdm,
        &device_81xx_pwrdm,
+       &active_81xx_pwrdm,
+       &default_81xx_pwrdm,
        &gem_814x_pwrdm,
        &ivahd_814x_pwrdm,
        &hdvpss_814x_pwrdm,
@@ -497,8 +499,8 @@ static struct powerdomain *powerdomains_ti814x[] __initdata = {
 static struct powerdomain *powerdomains_ti816x[] __initdata = {
        &alwon_81xx_pwrdm,
        &device_81xx_pwrdm,
-       &active_816x_pwrdm,
-       &default_816x_pwrdm,
+       &active_81xx_pwrdm,
+       &default_81xx_pwrdm,
        &ivahd0_816x_pwrdm,
        &ivahd1_816x_pwrdm,
        &ivahd2_816x_pwrdm,