radv: Always flush before writing acceleration structure properties
authorFriedrich Vock <friedrich.vock@gmx.de>
Sat, 10 Jun 2023 20:01:46 +0000 (22:01 +0200)
committerMarge Bot <emma+marge@anholt.net>
Sun, 11 Jun 2023 08:52:03 +0000 (08:52 +0000)
Equivalent of 284e604872 but for acceleration structure queries.
If an app inserts a barrier between AS builds and writing AS properties,
we must respect it or things will blow up.

Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23568>

src/amd/vulkan/radv_query.c

index a0c8dff..b9e74c0 100644 (file)
@@ -2201,7 +2201,7 @@ radv_CmdWriteAccelerationStructuresPropertiesKHR(
 
    radv_cs_add_buffer(cmd_buffer->device->ws, cs, pool->bo);
 
-   emit_query_flush(cmd_buffer, pool);
+   si_emit_cache_flush(cmd_buffer);
 
    ASSERTED unsigned cdw_max =
       radeon_check_space(cmd_buffer->device->ws, cs, 6 * accelerationStructureCount);