gn build: (manually) merge 51b4b17eb
authorNico Weber <nicolasweber@gmx.de>
Mon, 4 Nov 2019 14:51:41 +0000 (09:51 -0500)
committerNico Weber <nicolasweber@gmx.de>
Mon, 4 Nov 2019 14:51:41 +0000 (09:51 -0500)
Also reverts r353980 since that duplicated the GenAsmMatcher target for
AArch64. Instead use visiblity.

llvm/utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

index 54a12d2..588ac6f 100644 (file)
@@ -1,7 +1,10 @@
 import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("AArch64GenAsmMatcher") {
-  visibility = [ ":AsmParser" ]
+  visibility = [
+    ":AsmParser",
+    "//llvm/lib/Target/AArch64:LLVMAArch64CodeGen",
+  ]
   args = [ "-gen-asm-matcher" ]
   td_file = "../AArch64.td"
 }
index e6b6943..57759a2 100644 (file)
@@ -1,11 +1,5 @@
 import("//llvm/utils/TableGen/tablegen.gni")
 
-tablegen("AArch64GenAsmMatcher") {
-  visibility = [ ":LLVMAArch64CodeGen" ]
-  args = [ "-gen-asm-matcher" ]
-  td_file = "AArch64.td"
-}
-
 tablegen("AArch64GenCallingConv") {
   visibility = [ ":LLVMAArch64CodeGen" ]
   args = [ "-gen-callingconv" ]
@@ -53,7 +47,6 @@ tablegen("AArch64GenRegisterBank") {
 
 static_library("LLVMAArch64CodeGen") {
   deps = [
-    ":AArch64GenAsmMatcher",
     ":AArch64GenCallingConv",
     ":AArch64GenDAGISel",
     ":AArch64GenFastISel",
@@ -61,7 +54,9 @@ static_library("LLVMAArch64CodeGen") {
     ":AArch64GenGlobalISel",
     ":AArch64GenMCPseudoLowering",
     ":AArch64GenRegisterBank",
-    "AsmParser",
+
+    # See https://reviews.llvm.org/D69130
+    "AsmParser:AArch64GenAsmMatcher",
     "MCTargetDesc",
     "TargetInfo",
     "Utils",
index ef28b23..fd664ac 100644 (file)
@@ -1,7 +1,10 @@
 import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("RISCVGenAsmMatcher") {
-  visibility = [ ":AsmParser" ]
+  visibility = [
+    ":AsmParser",
+    "//llvm/lib/Target/RISCV:LLVMRISCVCodeGen",
+  ]
   args = [ "-gen-asm-matcher" ]
   td_file = "../RISCV.td"
 }
index 6fd9073..963d5bb 100644 (file)
@@ -45,7 +45,9 @@ static_library("LLVMRISCVCodeGen") {
     ":RISCVGenGlobalISel",
     ":RISCVGenMCPseudoLowering",
     ":RISCVGenRegisterBank",
-    "AsmParser",
+
+    # See https://reviews.llvm.org/D69130
+    "AsmParser:RISCVGenAsmMatcher",
     "MCTargetDesc",
     "TargetInfo",
     "Utils",