ARM: zynq: Align qspi node name with Linux kernel
authorMichal Simek <michal.simek@amd.com>
Tue, 6 Sep 2022 10:35:42 +0000 (12:35 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 13 Sep 2022 09:32:48 +0000 (11:32 +0200)
Nodes should follow generic rules where compatible and reg properties
should be listed on the top of node. That's why sync it up.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/922dca6227cb0aa4f79e6d3595c5f280ba020684.1662460540.git.michal.simek@amd.com
arch/arm/dts/zynq-7000.dtsi

index b4aa09d..11fa0ef 100644 (file)
                };
 
                qspi: spi@e000d000 {
-                       clock-names = "ref_clk", "pclk";
-                       clocks = <&clkc 10>, <&clkc 43>;
                        compatible = "xlnx,zynq-qspi-1.0";
-                       status = "disabled";
+                       reg = <0xe000d000 0x1000>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 19 4>;
-                       reg = <0xe000d000 0x1000>;
+                       clocks = <&clkc 10>, <&clkc 43>;
+                       clock-names = "ref_clk", "pclk";
+                       status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
 
                devcfg: devcfg@f8007000 {
                        compatible = "xlnx,zynq-devcfg-1.0";
+                       reg = <0xf8007000 0x100>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 8 4>;
-                       reg = <0xf8007000 0x100>;
                        clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
                        clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
                        syscon = <&slcr>;