drm/amdgpu: Correct the position in patch_cond_exec
authorJiadong.Zhu <Jiadong.Zhu@amd.com>
Thu, 15 Sep 2022 07:19:20 +0000 (15:19 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Sep 2022 13:41:46 +0000 (09:41 -0400)
The current position calulated in gfx_v9_0_ring_emit_patch_cond_exec
underflows when the wptr is divisible by ring->buf_mask + 1.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jiadong.Zhu <Jiadong.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 34428e3..0320be4 100644 (file)
@@ -5429,7 +5429,7 @@ static void gfx_v9_0_ring_emit_patch_cond_exec(struct amdgpu_ring *ring, unsigne
        BUG_ON(offset > ring->buf_mask);
        BUG_ON(ring->ring[offset] != 0x55aa55aa);
 
-       cur = (ring->wptr & ring->buf_mask) - 1;
+       cur = (ring->wptr - 1) & ring->buf_mask;
        if (likely(cur > offset))
                ring->ring[offset] = cur - offset;
        else