num_hs_stack_entries = 42;
num_ls_stack_entries = 42;
break;
+ case CHIP_SUMO:
+ num_ps_gprs = 93;
+ num_vs_gprs = 46;
+ num_temp_gprs = 4;
+ num_gs_gprs = 31;
+ num_es_gprs = 31;
+ num_hs_gprs = 23;
+ num_ls_gprs = 23;
+ num_ps_threads = 96;
+ num_vs_threads = 25;
+ num_gs_threads = 25;
+ num_es_threads = 25;
+ num_hs_threads = 25;
+ num_ls_threads = 25;
+ num_ps_stack_entries = 42;
+ num_vs_stack_entries = 42;
+ num_gs_stack_entries = 42;
+ num_es_stack_entries = 42;
+ num_hs_stack_entries = 42;
+ num_ls_stack_entries = 42;
+ break;
+ case CHIP_SUMO2:
+ num_ps_gprs = 93;
+ num_vs_gprs = 46;
+ num_temp_gprs = 4;
+ num_gs_gprs = 31;
+ num_es_gprs = 31;
+ num_hs_gprs = 23;
+ num_ls_gprs = 23;
+ num_ps_threads = 96;
+ num_vs_threads = 25;
+ num_gs_threads = 25;
+ num_es_threads = 25;
+ num_hs_threads = 25;
+ num_ls_threads = 25;
+ num_ps_stack_entries = 85;
+ num_vs_stack_entries = 85;
+ num_gs_stack_entries = 85;
+ num_es_stack_entries = 85;
+ num_hs_stack_entries = 85;
+ num_ls_stack_entries = 85;
+ break;
case CHIP_BARTS:
num_ps_gprs = 93;
num_vs_gprs = 46;
switch (family) {
case CHIP_CEDAR:
case CHIP_PALM:
+ case CHIP_SUMO:
+ case CHIP_SUMO2:
case CHIP_CAICOS:
break;
default:
case CHIP_CYPRESS:
case CHIP_HEMLOCK:
case CHIP_PALM:
+ case CHIP_SUMO:
+ case CHIP_SUMO2:
case CHIP_BARTS:
case CHIP_TURKS:
case CHIP_CAICOS:
case CHIP_CYPRESS: return "AMD CYPRESS";
case CHIP_HEMLOCK: return "AMD HEMLOCK";
case CHIP_PALM: return "AMD PALM";
+ case CHIP_SUMO: return "AMD SUMO";
+ case CHIP_SUMO2: return "AMD SUMO2";
case CHIP_BARTS: return "AMD BARTS";
case CHIP_TURKS: return "AMD TURKS";
case CHIP_CAICOS: return "AMD CAICOS";
{0x1002, 0x9614, CHIP_RS780},
{0x1002, 0x9615, CHIP_RS780},
{0x1002, 0x9616, CHIP_RS780},
+ {0x1002, 0x9640, CHIP_SUMO},
+ {0x1002, 0x9641, CHIP_SUMO},
+ {0x1002, 0x9642, CHIP_SUMO2},
+ {0x1002, 0x9643, CHIP_SUMO2},
+ {0x1002, 0x9644, CHIP_SUMO2},
+ {0x1002, 0x9645, CHIP_SUMO2},
+ {0x1002, 0x9647, CHIP_SUMO},
+ {0x1002, 0x9648, CHIP_SUMO},
+ {0x1002, 0x964a, CHIP_SUMO},
+ {0x1002, 0x964e, CHIP_SUMO},
+ {0x1002, 0x964f, CHIP_SUMO},
{0x1002, 0x9710, CHIP_RS880},
{0x1002, 0x9711, CHIP_RS880},
{0x1002, 0x9712, CHIP_RS880},