ARM: dts: aspeed-g6: Fix FSI master location

The FIS nodes were placed incorrectly in the device tree.

Fixes: 0fe4e304782c ("ARM: dts: aspeed-g6: Describe FSI masters")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 5f6142d..b72afba 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -163,26 +163,6 @@
                                spi-max-frequency = <50000000>;
                                status = "disabled";
                        };
-
-                       fsim0: fsi@1e79b000 {
-                               compatible = "aspeed,ast2600-fsi-master", "fsi-master";
-                               reg = <0x1e79b000 0x94>;
-                               interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&pinctrl_fsi1_default>;
-                               clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
-                               status = "disabled";
-                       };
-
-                       fsim1: fsi@1e79b100 {
-                               compatible = "aspeed,ast2600-fsi-master", "fsi-master";
-                               reg = <0x1e79b100 0x94>;
-                               interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&pinctrl_fsi2_default>;
-                               clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
-                               status = "disabled";
-                       };
                };
 
                mdio0: mdio@1e650000 {
@@ -595,6 +575,25 @@
                                ranges = <0 0x1e78a000 0x1000>;
                        };
 
+                       fsim0: fsi@1e79b000 {
+                               compatible = "aspeed,ast2600-fsi-master", "fsi-master";
+                               reg = <0x1e79b000 0x94>;
+                               interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_fsi1_default>;
+                               clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
+                               status = "disabled";
+                       };
+
+                       fsim1: fsi@1e79b100 {
+                               compatible = "aspeed,ast2600-fsi-master", "fsi-master";
+                               reg = <0x1e79b100 0x94>;
+                               interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_fsi2_default>;
+                               clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
+                               status = "disabled";
+                       };
                };
        };
 };