--- /dev/null
+#ifndef __ASM_MACH_REGS_RTC_H
+#define __ASM_MACH_REGS_RTC_H
+
+#include <mach/addr-map.h>
+
+#define RTC_VIRT_BASE (APB_VIRT_BASE + 0x10000)
+#define RTC_REG(x) (*((volatile u32 __iomem *)(RTC_VIRT_BASE + (x))))
+
+/*
+ * Real Time Clock
+ */
+
+#define RCNR RTC_REG(0x00) /* RTC Count Register */
+#define RTAR RTC_REG(0x04) /* RTC Alarm Register */
+#define RTSR RTC_REG(0x08) /* RTC Status Register */
+#define RTTR RTC_REG(0x0C) /* RTC Timer Trim Register */
+
+#define RTSR_HZE (1 << 3) /* HZ interrupt enable */
+#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
+#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
+#define RTSR_AL (1 << 0) /* RTC alarm detected */
+
+#endif /* __ASM_MACH_REGS_RTC_H */
static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
+static APBC_CLK(rtc, PXA910_RTC, 8, 32768);
static APMU_CLK(nand, NAND, 0x19b, 156000000);
static APMU_CLK(u2o, USB, 0x1b, 480000000);
INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
+ INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
static int __init pxa910_init(void)
.num_resources = ARRAY_SIZE(pxa910_resource_gpio),
.resource = pxa910_resource_gpio,
};
+
+static struct resource pxa910_resource_rtc[] = {
+ {
+ .start = 0xd4010000,
+ .end = 0xd401003f,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = IRQ_PXA910_RTC_INT,
+ .end = IRQ_PXA910_RTC_INT,
+ .name = "rtc 1Hz",
+ .flags = IORESOURCE_IRQ,
+ }, {
+ .start = IRQ_PXA910_RTC_ALARM,
+ .end = IRQ_PXA910_RTC_ALARM,
+ .name = "rtc alarm",
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa910_device_rtc = {
+ .name = "sa1100-rtc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(pxa910_resource_rtc),
+ .resource = pxa910_resource_rtc,
+};